Mesa (master): st/glsl_to_tgsi: use correct writemask when converting generic intrinsics

[Nicolai Hähnle]

Module: Mesa
Branch: master
Commit: b28938ffce0580e89e6012826900da2b6013b0df
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b28938ffce0580e89e6012826900da2b6013b0df

Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Mon Jun 12 10:53:07 2017 +0200

st/glsl_to_tgsi: use correct writemask when converting generic intrinsics

This fixes a bug when lowering ballotARB: previously, using writemask 0xf,
emit_asm would create TGSI_OPCODE_BALLOT instructions that span two registers
to cover 4 64-bit channels. This could trample over other a neighbouring
temporary.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101360
Cc: 17.1 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>

---

 src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 24d417d670..7852941acd 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -3978,6 +3978,8 @@ glsl_to_tgsi_visitor::visit_generic_intrinsic(ir_call *ir, unsigned op)
    ir->return_deref->accept(this);
    st_dst_reg dst = st_dst_reg(this->result);
 
+   dst.writemask = u_bit_consecutive(0, ir->return_deref->var->type->vector_elements);
+
    st_src_reg src[4] = { undef_src, undef_src, undef_src, undef_src };
    unsigned num_src = 0;
    foreach_in_list(ir_rvalue, param, &ir->actual_parameters) {