Mesa (master): i965/dri: Add intel_screen param to intel_create_winsys_renderbuffer
Chad Versace
chadversary at kemper.freedesktop.org
Thu Jun 22 20:03:19 UTC 2017
Module: Mesa
Branch: master
Commit: a9e5e9f5ec5c76475d0e00751d4fc1bfcaf9b6c5
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9e5e9f5ec5c76475d0e00751d4fc1bfcaf9b6c5
Author: Chad Versace <chadversary at chromium.org>
Date: Fri May 26 17:10:37 2017 -0700
i965/dri: Add intel_screen param to intel_create_winsys_renderbuffer
The param is currently unused. It will later be used it to support
R8G8B8X8 EGLConfigs on Skylake.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
---
src/mesa/drivers/dri/i965/intel_fbo.c | 8 +++++---
src/mesa/drivers/dri/i965/intel_fbo.h | 6 ++++--
src/mesa/drivers/dri/i965/intel_screen.c | 14 ++++++++------
3 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index 47c2f45d3f..f84cea1322 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -438,7 +438,8 @@ intel_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
* \param num_samples must be quantized.
*/
struct intel_renderbuffer *
-intel_create_winsys_renderbuffer(mesa_format format, unsigned num_samples)
+intel_create_winsys_renderbuffer(struct intel_screen *screen,
+ mesa_format format, unsigned num_samples)
{
struct intel_renderbuffer *irb = CALLOC_STRUCT(intel_renderbuffer);
if (!irb)
@@ -470,11 +471,12 @@ intel_create_winsys_renderbuffer(mesa_format format, unsigned num_samples)
* \param num_samples must be quantized.
*/
struct intel_renderbuffer *
-intel_create_private_renderbuffer(mesa_format format, unsigned num_samples)
+intel_create_private_renderbuffer(struct intel_screen *screen,
+ mesa_format format, unsigned num_samples)
{
struct intel_renderbuffer *irb;
- irb = intel_create_winsys_renderbuffer(format, num_samples);
+ irb = intel_create_winsys_renderbuffer(screen, format, num_samples);
irb->Base.Base.AllocStorage = intel_alloc_private_renderbuffer_storage;
return irb;
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h b/src/mesa/drivers/dri/i965/intel_fbo.h
index 56c8e6b3b2..7093ad6613 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.h
+++ b/src/mesa/drivers/dri/i965/intel_fbo.h
@@ -185,10 +185,12 @@ intel_rb_format(const struct intel_renderbuffer *rb)
}
extern struct intel_renderbuffer *
-intel_create_winsys_renderbuffer(mesa_format format, unsigned num_samples);
+intel_create_winsys_renderbuffer(struct intel_screen *screen,
+ mesa_format format, unsigned num_samples);
struct intel_renderbuffer *
-intel_create_private_renderbuffer(mesa_format format, unsigned num_samples);
+intel_create_private_renderbuffer(struct intel_screen *screen,
+ mesa_format format, unsigned num_samples);
struct gl_renderbuffer*
intel_create_wrapped_renderbuffer(struct gl_context * ctx,
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index e360d8d7c2..8621af2637 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1367,11 +1367,11 @@ intelCreateBuffer(__DRIscreen *dri_screen,
}
/* setup the hardware-based renderbuffers */
- rb = intel_create_winsys_renderbuffer(rgbFormat, num_samples);
+ rb = intel_create_winsys_renderbuffer(screen, rgbFormat, num_samples);
_mesa_attach_and_own_rb(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
if (mesaVis->doubleBufferMode) {
- rb = intel_create_winsys_renderbuffer(rgbFormat, num_samples);
+ rb = intel_create_winsys_renderbuffer(screen, rgbFormat, num_samples);
_mesa_attach_and_own_rb(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
}
@@ -1384,10 +1384,11 @@ intelCreateBuffer(__DRIscreen *dri_screen,
assert(mesaVis->stencilBits == 8);
if (screen->devinfo.has_hiz_and_separate_stencil) {
- rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT,
+ rb = intel_create_private_renderbuffer(screen,
+ MESA_FORMAT_Z24_UNORM_X8_UINT,
num_samples);
_mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base);
- rb = intel_create_private_renderbuffer(MESA_FORMAT_S_UINT8,
+ rb = intel_create_private_renderbuffer(screen, MESA_FORMAT_S_UINT8,
num_samples);
_mesa_attach_and_own_rb(fb, BUFFER_STENCIL, &rb->Base.Base);
} else {
@@ -1395,7 +1396,8 @@ intelCreateBuffer(__DRIscreen *dri_screen,
* Use combined depth/stencil. Note that the renderbuffer is
* attached to two attachment points.
*/
- rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT,
+ rb = intel_create_private_renderbuffer(screen,
+ MESA_FORMAT_Z24_UNORM_S8_UINT,
num_samples);
_mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base);
_mesa_attach_and_reference_rb(fb, BUFFER_STENCIL, &rb->Base.Base);
@@ -1403,7 +1405,7 @@ intelCreateBuffer(__DRIscreen *dri_screen,
}
else if (mesaVis->depthBits == 16) {
assert(mesaVis->stencilBits == 0);
- rb = intel_create_private_renderbuffer(MESA_FORMAT_Z_UNORM16,
+ rb = intel_create_private_renderbuffer(screen, MESA_FORMAT_Z_UNORM16,
num_samples);
_mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base);
}
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