Mesa (master): radeonsi: set COMPUTE_DISPATCH_INITIATOR.ORDER_MODE = 1

[Marek Olšák]

Module: Mesa
Branch: master
Commit: ccfac28835ac67b81182bc5860f1af92fd2d2447
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ccfac28835ac67b81182bc5860f1af92fd2d2447

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue Jun 27 17:33:54 2017 +0200

radeonsi: set COMPUTE_DISPATCH_INITIATOR.ORDER_MODE = 1

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

---

 src/gallium/drivers/radeonsi/si_compute.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 91a6a406c6..fba02faeb5 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -720,7 +720,10 @@ static void si_emit_dispatch_packets(struct si_context *sctx,
 
 	unsigned dispatch_initiator =
 		S_00B800_COMPUTE_SHADER_EN(1) |
-		S_00B800_FORCE_START_AT_000(1);
+		S_00B800_FORCE_START_AT_000(1) |
+		/* If the KMD allows it (there is a KMD hw register for it),
+		 * allow launching waves out-of-order. (same as Vulkan) */
+		S_00B800_ORDER_MODE(sctx->b.chip_class >= CIK);
 
 	if (info->indirect) {
 		uint64_t base_va = r600_resource(info->indirect)->gpu_address;