Mesa (master): vc4: Move rasterizer state packing to CSO creation time.

Eric Anholt anholt at kemper.freedesktop.org
Fri Jun 30 19:27:39 UTC 2017


Module: Mesa
Branch: master
Commit: f6c5c6b9be1a241c095af2da985c25b95ffbaa25
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f6c5c6b9be1a241c095af2da985c25b95ffbaa25

Author: Eric Anholt <eric at anholt.net>
Date:   Mon Feb  6 14:06:12 2017 -0800

vc4: Move rasterizer state packing to CSO creation time.

This gets our vc4_emit.c size back down a bit:

before:
   1020       0       0    1020     3fc src/gallium/drivers/vc4/.libs/vc4_emit.o

after:
    968	      0	      0	    968	    3c8	src/gallium/drivers/vc4/.libs/vc4_emit.o

---

 src/gallium/drivers/vc4/vc4_cl.h      |  5 +++++
 src/gallium/drivers/vc4/vc4_context.h | 17 +++++------------
 src/gallium/drivers/vc4/vc4_emit.c    | 15 +--------------
 src/gallium/drivers/vc4/vc4_state.c   | 17 ++++++++++++++---
 4 files changed, 25 insertions(+), 29 deletions(-)

diff --git a/src/gallium/drivers/vc4/vc4_cl.h b/src/gallium/drivers/vc4/vc4_cl.h
index c9a988e85b..ec3713c8a4 100644
--- a/src/gallium/drivers/vc4/vc4_cl.h
+++ b/src/gallium/drivers/vc4/vc4_cl.h
@@ -279,6 +279,11 @@ cl_get_emit_space(struct vc4_cl_out **cl, size_t size)
                 _loop_terminate = NULL;                          \
         }))                                                      \
 
+#define cl_emit_prepacked(cl, packet) do {                       \
+        memcpy((cl)->next, packet, sizeof(*packet));             \
+        cl_advance(&(cl)->next, sizeof(*packet));                \
+} while (0)
+
 /**
  * Helper function called by the XML-generated pack functions for filling in
  * an address field in shader records.
diff --git a/src/gallium/drivers/vc4/vc4_context.h b/src/gallium/drivers/vc4/vc4_context.h
index 3fe439543a..256f92d545 100644
--- a/src/gallium/drivers/vc4/vc4_context.h
+++ b/src/gallium/drivers/vc4/vc4_context.h
@@ -386,18 +386,11 @@ struct vc4_rasterizer_state {
         /* VC4_CONFIGURATION_BITS */
         uint8_t config_bits[3];
 
-        float point_size;
-
-        /**
-         * Half-float (1/8/7 bits) value of polygon offset units for
-         * VC4_PACKET_DEPTH_OFFSET
-         */
-        uint16_t offset_units;
-        /**
-         * Half-float (1/8/7 bits) value of polygon offset scale for
-         * VC4_PACKET_DEPTH_OFFSET
-         */
-        uint16_t offset_factor;
+        struct PACKED {
+                uint8_t depth_offset[V3D21_DEPTH_OFFSET_length];
+                uint8_t point_size[V3D21_POINT_SIZE_length];
+                uint8_t line_width[V3D21_LINE_WIDTH_length];
+        } packed;
 };
 
 struct vc4_depth_stencil_alpha_state {
diff --git a/src/gallium/drivers/vc4/vc4_emit.c b/src/gallium/drivers/vc4/vc4_emit.c
index 8fb379df5e..d0a701f17b 100644
--- a/src/gallium/drivers/vc4/vc4_emit.c
+++ b/src/gallium/drivers/vc4/vc4_emit.c
@@ -115,20 +115,7 @@ vc4_emit_state(struct pipe_context *pctx)
         }
 
         if (vc4->dirty & VC4_DIRTY_RASTERIZER) {
-                cl_emit(&job->bcl, DEPTH_OFFSET, depth) {
-                        depth.depth_offset_units =
-                                vc4->rasterizer->offset_units;
-                        depth.depth_offset_factor =
-                                vc4->rasterizer->offset_factor;
-                }
-
-                cl_emit(&job->bcl, POINT_SIZE, points) {
-                        points.point_size = vc4->rasterizer->point_size;
-                }
-
-                cl_emit(&job->bcl, LINE_WIDTH, points) {
-                        points.line_width = vc4->rasterizer->base.line_width;
-                }
+                cl_emit_prepacked(&job->bcl, &vc4->rasterizer->packed);
         }
 
         if (vc4->dirty & VC4_DIRTY_VIEWPORT) {
diff --git a/src/gallium/drivers/vc4/vc4_state.c b/src/gallium/drivers/vc4/vc4_state.c
index 3267bb043f..9a3438f849 100644
--- a/src/gallium/drivers/vc4/vc4_state.c
+++ b/src/gallium/drivers/vc4/vc4_state.c
@@ -94,6 +94,9 @@ vc4_create_rasterizer_state(struct pipe_context *pctx,
                             const struct pipe_rasterizer_state *cso)
 {
         struct vc4_rasterizer_state *so;
+        struct V3D21_DEPTH_OFFSET depth_offset = { V3D21_DEPTH_OFFSET_header };
+        struct V3D21_POINT_SIZE point_size = { V3D21_POINT_SIZE_header };
+        struct V3D21_LINE_WIDTH line_width = { V3D21_LINE_WIDTH_header };
 
         so = CALLOC_STRUCT(vc4_rasterizer_state);
         if (!so)
@@ -109,7 +112,9 @@ vc4_create_rasterizer_state(struct pipe_context *pctx,
         /* Workaround: HW-2726 PTB does not handle zero-size points (BCM2835,
          * BCM21553).
          */
-        so->point_size = MAX2(cso->point_size, .125f);
+        point_size.point_size = MAX2(cso->point_size, .125f);
+
+        line_width.line_width = cso->line_width;
 
         if (cso->front_ccw)
                 so->config_bits[0] |= VC4_CONFIG_BITS_CW_PRIMITIVES;
@@ -117,13 +122,19 @@ vc4_create_rasterizer_state(struct pipe_context *pctx,
         if (cso->offset_tri) {
                 so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET;
 
-                so->offset_units = float_to_187_half(cso->offset_units);
-                so->offset_factor = float_to_187_half(cso->offset_scale);
+                depth_offset.depth_offset_units =
+                        float_to_187_half(cso->offset_units);
+                depth_offset.depth_offset_factor =
+                        float_to_187_half(cso->offset_scale);
         }
 
         if (cso->multisample)
                 so->config_bits[0] |= VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_4X;
 
+        V3D21_DEPTH_OFFSET_pack(NULL, so->packed.depth_offset, &depth_offset);
+        V3D21_POINT_SIZE_pack(NULL, so->packed.point_size, &point_size);
+        V3D21_LINE_WIDTH_pack(NULL, so->packed.line_width, &line_width);
+
         return so;
 }
 




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