Mesa (master): freedreno/ir3: fragz cannot be half precision
Rob Clark
robclark at kemper.freedesktop.org
Mon Mar 13 14:33:16 UTC 2017
Module: Mesa
Branch: master
Commit: f805593b129729e516dea30245612b6a49b8505a
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f805593b129729e516dea30245612b6a49b8505a
Author: Rob Clark <robdclark at gmail.com>
Date: Tue Jan 31 08:31:37 2017 -0500
freedreno/ir3: fragz cannot be half precision
Signed-off-by: Rob Clark <robdclark at gmail.com>
---
src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index 77d8685..bb3f66c 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -2428,8 +2428,14 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
if (so->key.half_precision) {
for (i = 0; i < ir->noutputs; i++) {
struct ir3_instruction *out = ir->outputs[i];
+
if (!out)
continue;
+
+ /* if frag shader writes z, that needs to be full precision: */
+ if (so->outputs[i/4].slot == FRAG_RESULT_DEPTH)
+ continue;
+
out->regs[0]->flags |= IR3_REG_HALF;
/* output could be a fanout (ie. texture fetch output)
* in which case we need to propagate the half-reg flag
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