Mesa (master): 32 new commits

Mon Mar 20 23:09:26 UTC 2017

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe325e64230e01fa7f3044afb99f927bc594bef7
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Mar 16 13:44:52 2017 -0500

    swr: [rasterizer] Cleanup naming of codegen files
    
    All template files and generated files are prefixed with gen_.
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cf8fa673647b05f9e42b7ab1f283eef781da50b1
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Mar 15 15:40:31 2017 -0500

    swr: [rasterizer codegen] Remove BOM from knob_defs.py
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a5069e81f91d8ee4dad35f303782e6ce0b27391
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Mar 15 13:37:50 2017 -0500

    swr: [rasterizer codegen] Rewrite gen_llvm_types.py to use mako
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d0b3b05a28b2e236d3d8aa7b6335b0be4f02eda
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Mar 15 11:58:10 2017 -0500

    swr: [rasterizer codegen] Fix generation of knobs
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ed72758db74943dbc611ef45b180df9fb8f656c
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Mar 16 10:26:49 2017 -0500

    swr: [rasterizer codegen] Change backend template comment style
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2776d945456591d777b0e9767a2076b183027296
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Mar 15 01:12:59 2017 -0500

    swr: [rasterizer codegen] Rewrite gen_llvm_ir_macros.py to use mako
    
    Don't create/use cpp files, header only now.
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9538ba9bd14b7179edce10f05706b68f4719382a
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Tue Mar 14 22:10:07 2017 -0500

    swr: [rasterizer codegen] Quiet gen_backends.py execution
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=97cbabc8fb716dbdff65711afa23e6d6085cf258
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Tue Mar 14 19:12:20 2017 -0500

    swr: [rasterizer scripts] Put codegen scripts into a separate directory
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7046695a0e8f86ee612abfadfba4506bbb991cab
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Tue Mar 14 19:37:30 2017 -0500

    swr: [rasterizer core] Fix trifan regression from 9d3442575f
    
    Fixes piglit triangle-rasterization-overdraw.
    
    SIMD16 path not working.
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4cb69e817c0cec430ff956b979409bcfbfb4e3ca
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Tue Mar 7 16:23:18 2017 -0800

    swr: [rasterizer core] SIMD16 Frontend WIP - fix tesselation crashes
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab3f4449c37cf991f858a34d283ee8d24cb0725f
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Mar 2 09:43:11 2017 -0800

    swr: [rasterizer jitter] Fix LogicOp blend jit after assert changes
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8cd8240cfce1e26f2f237f1eb98d46ba47bca626
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Tue Feb 28 16:56:01 2017 -0800

    swr: [rasterizer] Convert more SWR_ASSERT(false, ...) to SWR_INVALID(...)
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab032fb436a758743f288da33d9940e8761f134e
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Tue Feb 28 16:48:40 2017 -0800

    swr: [rasterizer core] Fix typo in SIMD16 code path
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d011ba74eec3d5623df577d4696c0ef43ba0b2cf
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Tue Feb 28 13:19:26 2017 -0800

    swr: [rasterizer core/common] Fix the native AVX512 build under ICC
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f513d8d8304761a4e0dd483fa0fa4a82efd3aaa
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Mon Feb 27 17:59:37 2017 -0800

    swr: [rasterizer core] Allow no arguments to SWR_INVALID macro
    
    Turns out this is somewhat tricky with gcc/g++.
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b066b2bf3845f47b6294633266ee2aa64403f13
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Mon Feb 27 10:11:47 2017 -0800

    swr: [rasterizer] Slight assert refactoring
    
    Make asserts more robust.
    
    Add SWR_INVALID(...) as a replacement for SWR_ASSERT(0, ...)
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f445b6de9cc416ba3f3a900e98baa57e090c39ed
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Feb 16 10:53:01 2017 -0800

    swr: [rasterizer] Backend code adjustments
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e4d1294afbd798fa145d68a1c4f4ce80622a62dc
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Feb 22 11:11:58 2017 -0800

    swr: [rasterizer archrast] Fix the early and late depthstencil events
    
    The coverage and stencil mask arguments were reversed.
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a508c2c2ac5ebee7d8ee6b65733b7f78926ba355
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Tue Feb 21 11:20:38 2017 -0800

    swr: [rasterizer core] Implement double pumped SIMD16 TESS
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2cbac00221606fdda6af839afaf64ef649a73f83
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Sat Feb 18 00:29:06 2017 -0800

    swr: [rasterizer archrast/core/scripts] Fix archrast multithreading issue
    
    Per pixel stats are cached but were not always being flushed as threads
    moved from one draw context to the next.  Added an explicit flush to allow
    all archrast objects to flush any cached events.
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a36a7cf04d4f0e638e702aee9a03c91cdbc1d1a
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Fri Feb 17 14:14:06 2017 -0800

    swr: [rasterizer archrast] Remove redundant data from archrast files
    
    If count can be derived from other counts then this can be done in
    post processing scripts.
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1cc885d1d17016034455b33d23535d843bd728b0
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Fri Feb 17 13:16:59 2017 -0800

    swr: [rasterizer archrast/scripts] Further archrast cleanups
    
    Removed redundant data being written out to file
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1399fbd6fd58de48daa73fa4d7c4585e74277b01
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Feb 16 20:28:28 2017 -0800

    swr: [rasterizer core] Fix RECT_LIST primitive assembly
    
    The bug would make the 3rd component of attributes on the second
    triangle of a RECT be invalid.
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ade53519001329938b8d2aef4aa0f563dddfd82d
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Feb 16 18:31:09 2017 -0800

    swr: [rasterizer common] Add InterpolateComponentFlat utility
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab04221bf1064fbd95702c4eb8f197c20962d692
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Feb 16 14:48:28 2017 -0800

    swr: [rasterizer archrast] Fix performance issue with archrast stats
    
    Performance is now 50x faster with archrast now that we're properly
    filtering out all of the rdtsc begin/end.
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b228d2db188b4320c4f5ddbd13be32f8c0c6fa02
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Feb 16 13:50:21 2017 -0800

    swr: [rasterizer core] Implement SIMD16 GS and STREAMOUT
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5830a0a6f8aeb25c5365a849600f2f35d9257ee9
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Feb 15 23:57:50 2017 -0800

    swr: [rasterizer archrast] Add additional API events
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d2759c1eb3b77e9d86c52f2f8e6471a8f339228d
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Feb 15 13:45:16 2017 -0800

    swr: [rasterizer core/scripts] Autogen backend initialization function(s)
    
    Autogen functions that instantiates different BackendPixelRate templates.
    Functions get split into separate files after reaching a user defined
    threshold (currently 512 per file) to speed up compilation.
    
    This change will enable the addition of more template flags in the pixel
    back end.
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2c820d22cf703692b5de66289a0c81d7555aa9d6
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Mar 16 12:00:15 2017 -0500

    swr: [rasterizer core] backend.h declares gBackendPixelRateTable
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=50d491e22d615925bb772cb91f89745acd4de286
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Fri Feb 10 14:56:57 2017 -0800

    swr: [rasterizer core] Finish SIMD16 PA OPT including tesselation
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d3442575f818edd821b7777ff438f4734102f22
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Feb 9 13:43:32 2017 -0800

    swr: [rasterizer core] Finish SIMD16 PA OPT except tesselation
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7b94e5e1faccff1bab08b359d800b7ede9d63be6
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Mon Feb 6 15:25:57 2017 -0800

    swr: [rasterizer core] Support sparse numa id values on all OSes
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>