Mesa (master): radeonsi/gfx9: allow CMASK fast clear with RB+

[Marek Olšák]

Module: Mesa
Branch: master
Commit: 744317c9d2973cebe64ca91899815d6c1515b7f5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=744317c9d2973cebe64ca91899815d6c1515b7f5

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue Mar 28 03:38:47 2017 +0200

radeonsi/gfx9: allow CMASK fast clear with RB+

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

---

 src/gallium/drivers/radeon/r600_texture.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index d811a77ca8..8110ec1484 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -2691,13 +2691,13 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
 		    !(rctx->screen->debug_flags & DBG_NO_DCC_FB)) {
 			vi_separate_dcc_try_enable(rctx, tex);
 
-			/* RB+ isn't supported with a CMASK-based clear, so all
-			 * clears are considered to be hypothetically slow
+			/* RB+ isn't supported with a CMASK clear only on Stoney,
+			 * so all clears are considered to be hypothetically slow
 			 * clears, which is weighed when determining whether to
 			 * enable separate DCC.
 			 */
 			if (tex->dcc_gather_statistics &&
-			    rctx->screen->rbplus_allowed)
+			    rctx->family == CHIP_STONEY)
 				tex->num_slow_clears++;
 		}
 
@@ -2729,8 +2729,8 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
 				continue;
 			}
 
-			/* RB+ doesn't work with CMASK fast clear. */
-			if (rctx->screen->rbplus_allowed)
+			/* RB+ doesn't work with CMASK fast clear on Stoney. */
+			if (rctx->family == CHIP_STONEY)
 				continue;
 
 			/* ensure CMASK is enabled */