Mesa (master): radv: apply the tess+GS hang workaround to Polaris12 as well

Dave Airlie airlied at kemper.freedesktop.org
Sun May 7 10:18:09 UTC 2017


Module: Mesa
Branch: master
Commit: 2add79a73291e40621081b9a12938ac1931b9e96
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2add79a73291e40621081b9a12938ac1931b9e96

Author: Dave Airlie <airlied at redhat.com>
Date:   Sat May  6 21:14:11 2017 +0100

radv: apply the tess+GS hang workaround to Polaris12 as well

As I pointed out for radeonsi, and AMD confirmed, so fix this
in radv as well.

Cc: "17.1" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied at redhat.com>

---

 src/amd/vulkan/si_cmd_buffer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 1382272d71..d94e23b975 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -672,7 +672,8 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer,
 				if (family == CHIP_TONGA ||
 				    family == CHIP_FIJI ||
 				    family == CHIP_POLARIS10 ||
-				    family == CHIP_POLARIS11)
+				    family == CHIP_POLARIS11 ||
+				    family == CHIP_POLARIS12)
 					partial_vs_wave = true;
 			} else {
 				partial_vs_wave = true;




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