Mesa (master): radeonsi: fix gl_PrimitiveID in tessellation with instanced draws on SI
Nicolai Hähnle
nh at kemper.freedesktop.org
Mon May 8 15:42:26 UTC 2017
Module: Mesa
Branch: master
Commit: f16b7558632d1d2d355a8251e969b8fc41f9c1e8
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f16b7558632d1d2d355a8251e969b8fc41f9c1e8
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: Wed May 3 11:26:27 2017 +0200
radeonsi: fix gl_PrimitiveID in tessellation with instanced draws on SI
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeonsi/si_state_draw.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 5f1371a143..f0ed898cfb 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -188,6 +188,20 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
if (sctx->b.chip_class == SI) {
unsigned one_wave = 64 / MAX2(num_tcs_input_cp, num_tcs_output_cp);
*num_patches = MIN2(*num_patches, one_wave);
+
+ if (sctx->screen->b.info.max_se == 1) {
+ /* The VGT HS block increments the patch ID unconditionally
+ * within a single threadgroup. This results in incorrect
+ * patch IDs when instanced draws are used.
+ *
+ * The intended solution is to restrict threadgroups to
+ * a single instance by setting SWITCH_ON_EOI, which
+ * should cause IA to split instances up. However, this
+ * doesn't work correctly on SI when there is no other
+ * SE to switch to.
+ */
+ *num_patches = 1;
+ }
}
sctx->last_num_patches = *num_patches;
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