Mesa (master): radeonsi: reduce the number of generics for shader IO unique indices

[Nicolai Hähnle]

Module: Mesa
Branch: master
Commit: 0dd8aa44b3d08e33574bbc528188d9bb4ea8f7d3
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0dd8aa44b3d08e33574bbc528188d9bb4ea8f7d3

Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Wed May 10 13:22:10 2017 +0200

radeonsi: reduce the number of generics for shader IO unique indices

This is a high as possible while still allowing to merge the bitfields
with the next commit.

For OpenGL, 32 would be sufficient. Nine apparently uses (much!) higher
indices than. Indices that are out of bound don't hurt for VS-PS
pipelines, except that the VS output kill optimization is not applied.

Tested-by: Dieter Nützel <Dieter at nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>

---

 src/gallium/drivers/radeonsi/si_shader.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index cf97a719f2..307590024f 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -148,7 +148,7 @@ struct ac_shader_binary;
 /* Shader IO unique indices are supported for TGSI_SEMANTIC_GENERIC with an
  * index smaller than this.
  */
-#define SI_MAX_IO_GENERIC       60
+#define SI_MAX_IO_GENERIC       46
 
 /* SGPR user data indices */
 enum {