Mesa (master): i965: Pass pointer and end of assembly to brw_validate_instructions

Matt Turner mattst88 at kemper.freedesktop.org
Mon May 15 20:06:30 UTC 2017


Module: Mesa
Branch: master
Commit: a7217e909ce6e7d17eea8fd65191bb87deb3b496
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a7217e909ce6e7d17eea8fd65191bb87deb3b496

Author: Matt Turner <mattst88 at gmail.com>
Date:   Fri Apr 28 17:05:44 2017 -0700

i965: Pass pointer and end of assembly to brw_validate_instructions

This will allow us to more easily run brw_validate_instructions() on
shader programs we find in GPU hang error states.

Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>

---

 src/intel/compiler/brw_eu.h               |  3 ++-
 src/intel/compiler/brw_eu_validate.c      |  9 ++++-----
 src/intel/compiler/brw_fs_generator.cpp   | 10 ++++++++--
 src/intel/compiler/brw_vec4_generator.cpp |  8 ++++++--
 src/intel/compiler/test_eu_validate.cpp   |  3 ++-
 5 files changed, 22 insertions(+), 11 deletions(-)

diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h
index f422595233..87c69a479c 100644
--- a/src/intel/compiler/brw_eu.h
+++ b/src/intel/compiler/brw_eu.h
@@ -548,7 +548,8 @@ void brw_debug_compact_uncompact(const struct gen_device_info *devinfo,
                                  brw_inst *orig, brw_inst *uncompacted);
 
 /* brw_eu_validate.c */
-bool brw_validate_instructions(const struct brw_codegen *p, int start_offset,
+bool brw_validate_instructions(const struct gen_device_info *devinfo,
+                               void *assembly, int start_offset, int end_offset,
                                struct annotation_info *annotation);
 
 static inline int
diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c
index a632242e0f..ba3fe0d85d 100644
--- a/src/intel/compiler/brw_eu_validate.c
+++ b/src/intel/compiler/brw_eu_validate.c
@@ -1030,17 +1030,16 @@ region_alignment_rules(const struct gen_device_info *devinfo,
 }
 
 bool
-brw_validate_instructions(const struct brw_codegen *p, int start_offset,
+brw_validate_instructions(const struct gen_device_info *devinfo,
+                          void *assembly, int start_offset, int end_offset,
                           struct annotation_info *annotation)
 {
-   const struct gen_device_info *devinfo = p->devinfo;
-   const void *store = p->store;
    bool valid = true;
 
-   for (int src_offset = start_offset; src_offset < p->next_insn_offset;
+   for (int src_offset = start_offset; src_offset < end_offset;
         src_offset += sizeof(brw_inst)) {
       struct string error_msg = { .str = NULL, .len = 0 };
-      const brw_inst *inst = store + src_offset;
+      const brw_inst *inst = assembly + src_offset;
 
       if (is_unsupported_inst(devinfo, inst)) {
          ERROR("Instruction not supported on this Gen");
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index a7f95cc76b..2ade486705 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -2167,10 +2167,16 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
    annotation_finalize(&annotation, p->next_insn_offset);
 
 #ifndef NDEBUG
-   bool validated = brw_validate_instructions(p, start_offset, &annotation);
+   bool validated = brw_validate_instructions(devinfo, p->store,
+                                              start_offset,
+                                              p->next_insn_offset,
+                                              &annotation);
 #else
    if (unlikely(debug_flag))
-      brw_validate_instructions(p, start_offset, &annotation);
+      brw_validate_instructions(devinfo, p->store,
+                                start_offset,
+                                p->next_insn_offset,
+                                &annotation);
 #endif
 
    int before_size = p->next_insn_offset - start_offset;
diff --git a/src/intel/compiler/brw_vec4_generator.cpp b/src/intel/compiler/brw_vec4_generator.cpp
index 8505f69349..334933d15a 100644
--- a/src/intel/compiler/brw_vec4_generator.cpp
+++ b/src/intel/compiler/brw_vec4_generator.cpp
@@ -2180,10 +2180,14 @@ generate_code(struct brw_codegen *p,
    annotation_finalize(&annotation, p->next_insn_offset);
 
 #ifndef NDEBUG
-   bool validated = brw_validate_instructions(p, 0, &annotation);
+   bool validated = brw_validate_instructions(devinfo, p->store,
+                                              0, p->next_insn_offset,
+                                              &annotation);
 #else
    if (unlikely(debug_flag))
-      brw_validate_instructions(p, 0, &annotation);
+      brw_validate_instructions(devinfo, p->store,
+                                0, p->next_insn_offset,
+                                &annotation);
 #endif
 
    int before_size = p->next_insn_offset;
diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp
index 76652dc43d..ed67c4d422 100644
--- a/src/intel/compiler/test_eu_validate.cpp
+++ b/src/intel/compiler/test_eu_validate.cpp
@@ -118,7 +118,8 @@ validate(struct brw_codegen *p)
       annotation.ann[annotation.ann_count].offset = p->next_insn_offset;
    }
 
-   bool ret = brw_validate_instructions(p, 0, &annotation);
+   bool ret = brw_validate_instructions(devinfo, p->store, 0,
+                                        p->next_insn_offset, &annotation);
 
    if (print) {
       dump_assembly(p->store, annotation.ann_count, annotation.ann, p->devinfo);




More information about the mesa-commit mailing list