Mesa (master): ac: add radeon_surf::htile_slice_size

[Nicolai Hähnle]

Module: Mesa
Branch: master
Commit: c488bf24ed47b98c580e162e8457bff7d6f57ed3
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c488bf24ed47b98c580e162e8457bff7d6f57ed3

Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Wed May 10 22:52:27 2017 +0200

ac: add radeon_surf::htile_slice_size

Vulkan needs it.

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

---

 src/amd/common/ac_surface.c | 4 ++++
 src/amd/common/ac_surface.h | 2 ++
 2 files changed, 6 insertions(+)

diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 609bf5c86a..d77b490c01 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -350,6 +350,7 @@ static int gfx6_compute_level(ADDR_HANDLE addrlib,
 
 		if (ret == ADDR_OK) {
 			surf->htile_size = AddrHtileOut->htileBytes;
+			surf->htile_slice_size = AddrHtileOut->sliceSize;
 			surf->htile_alignment = AddrHtileOut->baseAlign;
 		}
 	}
@@ -580,6 +581,7 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib,
 	surf->dcc_size = 0;
 	surf->dcc_alignment = 1;
 	surf->htile_size = 0;
+	surf->htile_slice_size = 0;
 	surf->htile_alignment = 1;
 
 	/* Calculate texture layout information. */
@@ -775,6 +777,7 @@ static int gfx9_compute_miptree(ADDR_HANDLE addrlib,
 		surf->u.gfx9.htile.rb_aligned = hin.hTileFlags.rbAligned;
 		surf->u.gfx9.htile.pipe_aligned = hin.hTileFlags.pipeAligned;
 		surf->htile_size = hout.htileBytes;
+		surf->htile_slice_size = hout.sliceSize;
 		surf->htile_alignment = hout.baseAlign;
 	} else {
 		/* DCC */
@@ -961,6 +964,7 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib,
 	surf->surf_size = 0;
 	surf->dcc_size = 0;
 	surf->htile_size = 0;
+	surf->htile_slice_size = 0;
 	surf->u.gfx9.surf_offset = 0;
 	surf->u.gfx9.stencil_offset = 0;
 	surf->u.gfx9.fmask_size = 0;
diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h
index 9905be916b..bfd2a95775 100644
--- a/src/amd/common/ac_surface.h
+++ b/src/amd/common/ac_surface.h
@@ -166,6 +166,8 @@ struct radeon_surf {
     uint64_t                    dcc_size;
     uint64_t                    htile_size;
 
+    uint32_t                    htile_slice_size;
+
     uint32_t                    surf_alignment;
     uint32_t                    dcc_alignment;
     uint32_t                    htile_alignment;