Mesa (master): nvc0/ir: SHLADD's middle source must be an immediate
Ilia Mirkin
imirkin at kemper.freedesktop.org
Sat May 20 07:13:04 UTC 2017
Module: Mesa
Branch: master
Commit: 82e77d4e4484b5d4f6a7b4751a17c882e6d2ad69
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=82e77d4e4484b5d4f6a7b4751a17c882e6d2ad69
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat May 20 03:11:12 2017 -0400
nvc0/ir: SHLADD's middle source must be an immediate
The instruction encodings only allow for immediates. Don't try to
replace a zero (which is dumb to have in that op in any case) with RZ.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 732e1a93b4..64d743708a 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -642,6 +642,8 @@ NVC0LegalizePostRA::replaceZero(Instruction *i)
for (int s = 0; i->srcExists(s); ++s) {
if (s == 2 && i->op == OP_SUCLAMP)
continue;
+ if (s == 1 && i->op == OP_SHLADD)
+ continue;
ImmediateValue *imm = i->getSrc(s)->asImm();
if (imm) {
if (i->op == OP_SELP && s == 2) {
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