Mesa (master): freedreno/ir3: switch to NIR by default

[Rob Clark]

Module: Mesa
Branch: master
Commit: 1db28fbbea6e6c3f305783d6211a040ed38f4abf
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1db28fbbea6e6c3f305783d6211a040ed38f4abf

Author: Rob Clark <robdclark at gmail.com>
Date:   Tue May 23 12:05:12 2017 -0400

freedreno/ir3: switch to NIR by default

Now that we lower vars to regs, we no longer regress for anything that
does complex dereferences.  (With tgsi, derefers are already lowered
before tgsi_to_nir, but not with glsl_to_nir.)  In fact it actually
fixes a few things to bypass tgsi.

So make NIR the default (finally!)

Signed-off-by: Rob Clark <robdclark at gmail.com>

---

 src/gallium/drivers/freedreno/freedreno_screen.c | 17 ++---------------
 src/gallium/drivers/freedreno/freedreno_util.h   |  1 -
 2 files changed, 2 insertions(+), 16 deletions(-)

diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index a783d20454..99a6d3c9c8 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -75,7 +75,6 @@ static const struct debug_named_value debug_options[] = {
 		{"shaderdb",  FD_DBG_SHADERDB, "Enable shaderdb output"},
 		{"flush",     FD_DBG_FLUSH,  "Force flush after every draw"},
 		{"deqp",      FD_DBG_DEQP,   "Enable dEQP hacks"},
-		{"nir",       FD_DBG_NIR,    "Prefer NIR as native IR"},
 		{"inorder",   FD_DBG_INORDER,"Disable reordering for draws/blits"},
 		{"bstat",     FD_DBG_BSTAT,  "Print batch stats at context destroy"},
 		{"nogrow",    FD_DBG_NOGROW, "Disable \"growable\" cmdstream buffers, even if kernel supports it"},
@@ -521,18 +520,9 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
 	case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 		return 16;
 	case PIPE_SHADER_CAP_PREFERRED_IR:
-		switch (shader) {
-		case PIPE_SHADER_FRAGMENT:
-		case PIPE_SHADER_VERTEX:
-			if ((fd_mesa_debug & FD_DBG_NIR) && is_ir3(screen))
-				return PIPE_SHADER_IR_NIR;
-			return PIPE_SHADER_IR_TGSI;
-		default:
-			/* tgsi_to_nir doesn't really support much beyond FS/VS: */
-			debug_assert(is_ir3(screen));
+		if (is_ir3(screen))
 			return PIPE_SHADER_IR_NIR;
-		}
-		break;
+		return PIPE_SHADER_IR_TGSI;
 	case PIPE_SHADER_CAP_SUPPORTED_IRS:
 		if (is_ir3(screen)) {
 			return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
@@ -568,9 +558,6 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
 			switch(shader)
 			{
 			case PIPE_SHADER_FRAGMENT:
-				if (!(fd_mesa_debug & FD_DBG_NIR))
-					return 0;
-				/* fallthrough */
 			case PIPE_SHADER_COMPUTE:
 				return 24;
 			default:
diff --git a/src/gallium/drivers/freedreno/freedreno_util.h b/src/gallium/drivers/freedreno/freedreno_util.h
index e644433790..6b0fb700d6 100644
--- a/src/gallium/drivers/freedreno/freedreno_util.h
+++ b/src/gallium/drivers/freedreno/freedreno_util.h
@@ -76,7 +76,6 @@ enum adreno_stencil_op fd_stencil_op(unsigned op);
 #define FD_DBG_SHADERDB 0x0800
 #define FD_DBG_FLUSH    0x1000
 #define FD_DBG_DEQP     0x2000
-#define FD_DBG_NIR      0x4000
 #define FD_DBG_INORDER  0x8000
 #define FD_DBG_BSTAT   0x10000
 #define FD_DBG_NOGROW  0x20000