Mesa (17.2): 29 new commits
Andres Gomez
tanty at kemper.freedesktop.org
Wed Nov 8 23:35:29 UTC 2017
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0195b78aa74f7c133519a26160d47365e64b68be
Author: Andres Gomez <agomez at igalia.com>
Date: Tue Nov 7 12:49:54 2017 +0200
cherry-ignore: automake: include git_sha1.h.in in release tarball
fixes: This commit has more than one Fixes tag but the commit it
addresses didn't land in branch.
Signed-off-by: Andres Gomez <agomez at igalia.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a23bd4ea8789e060b41292325f92d198001ea036
Author: Andres Gomez <agomez at igalia.com>
Date: Wed Nov 1 11:24:12 2017 +0200
cherry-ignore: added 17.3 nominations.
stable: 17.3 nominations only.
Signed-off-by: Andres Gomez <agomez at igalia.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=27cd0abe8e171b254471888455f5eb21ae6f51d0
Author: Andres Gomez <agomez at igalia.com>
Date: Fri Nov 3 14:53:31 2017 +0200
cherry-ignore: intel/fs: Alloc pull constants off mem_ctx
stable: This commit addressed earlier commit 8d90e28839 which did not
land in branch.
Signed-off-by: Andres Gomez <agomez at igalia.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5dc8c43aa3d14642bac3502b685c41969b08f00
Author: Andres Gomez <agomez at igalia.com>
Date: Fri Nov 3 15:17:15 2017 +0200
cherry-ignore: etnaviv: don't do resolve-in-place without valid TS
stable: This commit addressed earlier commit 78ade659569 which did not
land in branch.
Signed-off-by: Andres Gomez <agomez at igalia.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=526ecbe4176e01f5b353df05ed0773e1198606bf
Author: Andres Gomez <agomez at igalia.com>
Date: Wed Nov 1 13:00:47 2017 +0200
cherry-ignore: i965: fix blorp stage_prog_data->param leak
stable: This commit addressed earlier commit 8d90e28839 which did not
land in branch.
Signed-off-by: Andres Gomez <agomez at igalia.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d91d135649e6b0665c39866512cdbb7cb0a0ca3
Author: Andres Gomez <agomez at igalia.com>
Date: Tue Nov 7 12:39:31 2017 +0200
cherry-ignore: radv: copy indirect lowering settings from radeonsi
fixes: remove 6ce550453f1 and 059434e1763, which were depending in now
backported 087e010b2b3.
Signed-off-by: Andres Gomez <agomez at igalia.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd0cf2c9460228cc6f2e3ee00a6e1b0f07757a49
Author: Tomasz Figa <tfiga at chromium.org>
Date: Tue Sep 26 17:35:56 2017 +0900
glsl: Allow precision mismatch on dead data with GLSL ES 1.00
Commit 259fc505454ea6a67aeacf6cdebf1398d9947759 added linker error for
mismatching uniform precision, as required by GLES 3.0 specification and
conformance test-suite.
Several Android applications, including Forge of Empires, have shaders
which violate this rule, on a dead varying that will be eliminated.
The problem affects a big number of applications using Cocos2D engine
and other GLES implementations accept this, this poses a serious
application compatibility issue.
Starting from GLSL ES 3.0, declarations with conflicting precision
qualifiers are explicitly prohibited. However GLSL ES 1.00 does not
clearly specify the behavior, except that
"Uniforms are defined to behave as if they are using the same storage in
the vertex and fragment processors and may be implemented this way.
If uniforms are used in both the vertex and fragment shaders, developers
should be warned if the precisions are different. Conversion of
precision should never be implicit."
The word "used" is not clear in this context and might refer to
1) declared (same as GLES 3.x)
2) referred after post-processing, or
3) linked after all optimizations are done.
Looking at existing applications, 2) or 3) seems to be widely adopted.
To avoid compatibility issues, turn the error into a warning if GLSL ES
version is lower than 3.0 and the data is dead in at least one of the
shaders.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97532
Signed-off-by: Tomasz Figa <tfiga at chromium.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit 0886be093fb871b0b6169718277e0f4d18df3ea7)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6a73458510c124856ade7e5a7e805fb08ae13671
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Tue Nov 7 10:00:50 2017 +0100
radv: Disallow indirect outputs for GS on GFX9 as well.
Since it also uses the output vector before writing to memory.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
Reviewed-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
(cherry picked from commit c07d719e8b683e1bf78f187dd17fe4716f4e5e9c)
[Bas Nieuwenhuizen: resolve conflicts]
Conflicts:
src/amd/vulkan/radv_shader.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ba45e7d33bb91d7b0fc65ecae9cbc8a2ba68593
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Tue Nov 7 10:00:49 2017 +0100
radv: Don't use vgpr indexing for outputs on GFX9.
Due to LLVM bugs. Fixes a bunch of dEQP-VK.glsl.indexing.*
tests.
Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."'
Reviewed-by: Dave Airlie <airlied at redhat.com>
(cherry picked from commit 6ce550453f1df64caeb956f215d32da96b89f2b1)
[Bas Nieuwenhuizen: resolve conflicts]
Conflicts:
src/amd/vulkan/radv_shader.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=662cff8fe4c5cd06b7cb44edefdc2d182b8328d8
Author: Timothy Arceri <tarceri at itsqueeze.com>
Date: Tue Nov 7 10:00:48 2017 +0100
radv: copy indirect lowering settings from radeonsi
It looks the original indirect mask was probably copied from
ANV.
Sascha Willems demo results:
tessellation ~4000 -> ~4200 fps
V2: continue lowering local indirects due to llvm deficiencies.
(cherry picked from commit 087e010b2b3dd83a539f97203909d6c43b5da87c)
[Bas Nieuwenhuizen: patch is a backport for 17.2 of the cherry-pick above]
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b0b7f1833513aa2164361f7b3d50c2a36af53b0
Author: Dave Airlie <airlied at redhat.com>
Date: Fri Nov 3 04:06:35 2017 +0000
radv: add initial copy descriptor support. (v2)
It appears the latest dota2 vulkan uses this,
and we get a hang in VR mode without it.
v2: remove finishme I left in after finishing.
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Reviewed-by: Andres Rodriguez <andresx7 at gmail.com>
Cc: "17.2 17.3" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied at redhat.com>
(cherry picked from commit 4bcb48b8319fd8185a326bbd1f77191bddd35506)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=23eaeeb88ad787b0e3253807fb6f7180a0cb0711
Author: Dave Airlie <airlied at redhat.com>
Date: Mon Nov 6 00:35:17 2017 +0000
radv: free attachments on end command buffer.
If we allocate attachments in the begin command buffer due to the
render pass continue bit, we were leaking them.
Since renderpasses inside a cmd buffer malloc/free these properly,
and set to NULL, we just need to call free at end.
Fixes a memory leak with multithreading demo.
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Cc: "17.2 17.3" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied at redhat.com>
(cherry picked from commit f0ae06a13c1a60f58de77401f705eaf620b5b822)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez at igalia.com>
Conflicts:
src/amd/vulkan/radv_cmd_buffer.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8e0f66b5562769c59a86744e91e8f6d13347943
Author: Dave Airlie <airlied at redhat.com>
Date: Fri May 26 11:24:59 2017 +1000
i915g: make gears run again.
We need to validate some structs exist before we dirty the states, and
avoid the problem in some other places.
Fixes: e027935a7 ("st/mesa: don't update unrelated states in non-draw calls such as Clear")
(cherry picked from commit cc69f2385ee5405cd1bef746d3e9006fc5430545)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bd2037da82ec8abc1db8834f67496b4b3cd74504
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Wed Nov 1 09:26:48 2017 +0100
radv: Don't expose heaps with 0 memory.
It confuses CTS. This pregenerates the heap info into the
physical device, so we can use it for translating contiguous
indices into our "standard" ones.
This also makes the WSI a bit smarter in case the first preferred
heap does not exist.
Reviewed-by: Dave Airlie <airlied at redhat.com>
CC: <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 806721429afa090380bf39a4958fe4e21c63816c)
[Andres Gomez: resolve trivial conflicts]
Signed-off-by: Andres Gomez <agomez at igalia.com>
Conflicts:
src/amd/vulkan/radv_device.c
src/amd/vulkan/radv_private.h
src/amd/vulkan/radv_wsi.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=388b68a61ee9f22a584423cd20434f6d729ba0c9
Author: Eric Engestrom <eric.engestrom at imgtec.com>
Date: Wed Oct 25 14:08:58 2017 +0100
vc4: fix release build
Mesa's DEBUG and assert's NDEBUG are not tied to each other, so we need
to explicitly compile this code out.
Fixes: 3df78928786134874eafa "vc4: Drop reloc_count tracking for debug
asserts on non-debug builds."
Cc: Eric Anholt <eric at anholt.net>
Signed-off-by: Eric Engestrom <eric.engestrom at imgtec.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
(cherry picked from commit 5d44e35a8f3967b40db153fdcedb9294d44ae5c4)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=71a33028bab08cdbd632c5404af8d0f816499b63
Author: Gert Wollny <gw.fossdev at gmail.com>
Date: Mon Oct 16 21:06:26 2017 +0200
r600/sb: bail out if prepare_alu_group() doesn't find a proper scheduling
It is possible that the optimizer ends up in an infinite loop in
post_scheduler::schedule_alu(), because post_scheduler::prepare_alu_group()
does not find a proper scheduling. This can be deducted from
pending.count() being larger than zero and not getting smaller.
This patch works around this problem by signalling this failure so that the
optimizers bails out and the un-optimized shader is used.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103142
Cc: <mesa-stable at lists.freedesktop.org>
Signed-off-by: Gert Wollny <gw.fossdev at gmail.com>
Signed-off-by: Dave Airlie <airlied at redhat.com>
(cherry picked from commit 69eee511c631a8372803f175bd6f5a9551230424)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f33f5e9ad663aa0447c08ee071495482b56dffd9
Author: Neil Roberts <nroberts at igalia.com>
Date: Tue Oct 31 15:05:33 2017 +0100
nir/opt_intrinsics: Fix values for gl_SubGroupG{e,t}MaskARB
Previously the values were calculated by just shifting ~0 by the
invocation ID. This would end up including bits that are higher than
gl_SubGroupSizeARB. The corresponding CTS test effectively requires that
these high bits be zero so it was failing. There is a Piglit test as
well but this appears to checking the wrong values so it passes.
For the two greater-than bitmasks, this patch adds an extra mask with
(~0>>(64-gl_SubGroupSizeARB)) to force these bits to zero.
Fixes: KHR-GL45.shader_ballot_tests.ShaderBallotBitmasks
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102680#c3
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Cc: mesa-stable at lists.freedesktop.org
Signed-off-by: Neil Roberts <nroberts at igalia.com>
(cherry picked from commit b697ece10aa041b8653eb184d73dcf5b846729a3)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=af1dc1cf874245e3ee092bb74fec2a9f30c75b1f
Author: Nanley Chery <nanley.g.chery at intel.com>
Date: Thu Oct 26 16:05:52 2017 -0700
i965: Check CCS_E compatibility for texture view rendering
Only use CCS_E to render to a texture that is CCS_E-compatible with the
original texture's miptree (linear) format. This prevents render
operations from writing data that can't be decoded with the original
miptree format.
On Gen10, with the new CCS_E-enabled formats handled, this enables the
driver to pass the arb_texture_view-rendering-formats piglit test.
v2. Add a TODO for texturing. (Jason)
Cc: <mesa-stable at lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery at intel.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
(cherry picked from commit 9e849eb8bb97259136b40dc2b06f42a81cfd3dae)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d7546a31230d364ba887a57283b15eb2836c7dc
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Wed Oct 25 16:50:11 2017 +0300
intel/compiler/gen9: Pixel shader header only workaround
Fixes intermittent GPU hangs on Broxton with an Intel internal
test case.
There are plenty of similar fragment shaders in piglit that do
not use any varyings and any uniforms. According to the
documentation special timing is needed between pipeline stages.
Apparently we just don't hit that with piglit. Even with the
failing test case one doesn't always get the hang.
Moreover, according to the error states the hang happens
significantly later than the execution of the problematic shader.
There are multiple render cycles (primitive submissions) in between.
I've also seen error states where the ACTHD points outside the
batch. Almost as if the hardware writes somewhere that gets used
later on. That would also explain why piglit doesn't suffer from
this - most tests kick off one render cycle and any corruption
is left unseen.
v2 (Ken): Instead of enabling push constants, enable one of the
inputs (PSIZ).
v3 (Ken, Jason): Use LAYER instead making vulkan emit_3dstate_sbe()
happy.
Cc: "17.3 17.2" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
(cherry picked from commit 97e01adfd549c260efd615289938265306d42a05)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=67fc6d43bdac3c07b01e2feb250cc23d45284280
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Oct 26 11:44:09 2017 -0700
mesa: Accept GL_BACK in get_fb0_attachment with ARB_ES3_1_compatibility.
According to the ARB_ES3_1_compatibility specification,
glGetFramebufferAttachmentParameteriv is supposed to accept BACK,
and it behaves exactly like BACK_LEFT.
Fixes a GL error in GFXBench 5 Aztec Ruins.
Cc: "17.3 17.2" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
(cherry picked from commit 4f538c3f99b25dc96cd20314ce7785fd4d333be1)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=71ea414782d5a4e908a0412d7491f2b1ecf0a272
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Fri Oct 27 12:54:02 2017 +0300
i965: unref push_const_bo in intelDestroyContext
Valgrind shows that leak is caused by gen6_upload_push_constant, add
unref push_const_bo per stage to destructor to fix this (like done for
scratch_bo).
==10952== 144 bytes in 1 blocks are definitely lost in loss record 44 of 66
==10952== at 0x4C30A1E: calloc (vg_replace_malloc.c:711)
==10952== by 0x8C02847: bo_alloc_internal.constprop.10 (brw_bufmgr.c:344)
==10952== by 0x8C425C4: intel_upload_space (intel_upload.c:101)
==10952== by 0x8C22ED0: gen6_upload_push_constants (gen6_constant_state.c:154)
v2: remove if conditions, brw_bo_unreference handles NULL (Ken, Emil)
Fixes: 24891d7c05 ("i965: Store per-stage push constant BO pointers.")
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 0b131ca427d788ae08426bdeddb8f4bd3c7da202)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7ddddc9892810b65bda232a00f798aa4a258fc8
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Oct 23 14:25:44 2017 -0700
i965/miptree: Take an isl_format in render_aux_usage
Not all rendering matches the miptree format. We allow rendering to
texture views so there are cases where it may not match. In those
cases, our current scheme of just passing the value of ctx->sRGBEnabled
isn't viable. Instead, just do what we do for texturing and pass the
view format in directly.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 39c5c12f8fbee9eec26a627f247d1f3ef7d4bf39)
[Andres Gomez: remove code which was trivially modified previously]
Signed-off-by: Andres Gomez <agomez at igalia.com>
Conflicts:
src/mesa/drivers/dri/i965/brw_draw.c
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6dc8e69da68c58acb60d1718841cf463a2a9537d
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Oct 23 14:24:06 2017 -0700
i965/blorp: Use more temporary isl_format variables
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 78e50185d6f9546f8b09cf281f5e5a17195a7ee5)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=78ff359d042804f74624abf4b9eab846d0e2ebd8
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Oct 23 15:51:21 2017 -0700
i965/blorp: Use blorp_to_isl_format for src_isl_format in blit_miptrees
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 94389943b63bf8e25fecbbdf357ae5da100d2fc9)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e27cdc7712f28532dc19cc5a772dd7b245b586b
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Oct 26 10:08:21 2017 -0700
spirv: Claim support for the simple memory model
It's rather surprising that we've never actually hit this before.
Aparently, Ian's SPIR-V generator currently claims the Simple when you
don't do anything complex. We really shouldn't assert-fail on it.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 8ab9820d34d3a454e455c99e28ed2b6031b25b0f)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1317bdc3a1232d05c81672e9e1ff712175ff7a1f
Author: Leo Liu <leo.liu at amd.com>
Date: Wed Oct 25 09:46:17 2017 -0400
radeon/video: add gfx9 offsets when rejoin the video surface
For CPU access.
Signed-off-by: Leo Liu <leo.liu at amd.com>
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Christian König <christian.koenig at amd.com>
(cherry picked from commit ea3dc75d72c148dabffa71e8657bfd831ad0afe9)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e95c4af12d432f76b2133fbbe5b7580204c8c089
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: Thu Oct 12 11:21:26 2017 +0200
amd/common/gfx9: workaround DCC corruption more conservatively
Fixes KHR-GL45.texture_swizzle.smoke and others on Vega.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102809
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit f9ccfda9bc8166f833fdb64adf1eca5b8ee69251)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d132c0d792e3e49c4beb6a7466c82dc4eff3cbd3
Author: Marek Olšák <marek.olsak at amd.com>
Date: Thu Aug 17 23:35:36 2017 +0200
ac/surface/gfx9: don't allow DCC for the smallest mipmap levels
This fixes garbage there if we don't flush TC L2 after rendering.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
(cherry picked from commit 759526813be137f7f139d6b4e56c5afeb8ba53c9)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e28870b9fe5523b7e166bbdb91d3c0920b764d83
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Sep 27 16:53:26 2017 +0200
st/dri: don't expose modifiers in EGL if the driver doesn't implement them
This unbreaks waffle/gbm (piglit/gbm) which fails initialization.
v2: also don't set queryDmaBufFormats
Reviewed-by: Daniel Stone <daniel at fooishbar.org>
(cherry picked from commit a65db0ad1c3ace58fbc81b6860e28c0a7645257c)
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