Mesa (master): broadcom/vc5: Align 1D texture miplevels to 64b.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: 494effd242d9311f5ff1c923d55322970e4296bc
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=494effd242d9311f5ff1c923d55322970e4296bc

Author: Eric Anholt <eric at anholt.net>
Date:   Mon Nov 20 10:14:38 2017 -0800

broadcom/vc5: Align 1D texture miplevels to 64b.

Fixes tex-miplevel-selection GL2:texture() 1D

---

 src/gallium/drivers/vc5/vc5_resource.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/drivers/vc5/vc5_resource.c b/src/gallium/drivers/vc5/vc5_resource.c
index dad238f89f..768f8d41f0 100644
--- a/src/gallium/drivers/vc5/vc5_resource.c
+++ b/src/gallium/drivers/vc5/vc5_resource.c
@@ -442,6 +442,8 @@ vc5_setup_slices(struct vc5_resource *rsc)
 
                 if (!rsc->tiled) {
                         slice->tiling = VC5_TILING_RASTER;
+                        if (prsc->target == PIPE_TEXTURE_1D)
+                                level_width = align(level_width, 64 / rsc->cpp);
                 } else {
                         if ((i != 0 || !uif_top) &&
                             (level_width <= utile_w ||