Mesa (master): radv: do not allocate CMASK or DCC for small surfaces

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: ff0f17da1446e7aa965e06c04a6ad5a55d95463d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ff0f17da1446e7aa965e06c04a6ad5a55d95463d

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Wed Nov 29 14:48:32 2017 +0100

radv: do not allocate CMASK or DCC for small surfaces

The idea is ported from RadeonSI, but using 512x512 instead of
256x256 seems slightly better. This improves dota2 performance
by +2%.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Dave Airlie <airlied at redhat.com>
Tested-by: Dieter Nützel <Dieter at nuetzel-hh.de>

---

 src/amd/vulkan/radv_image.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index b145e81f82..ee03a1dc6a 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -806,6 +806,16 @@ radv_image_alloc_htile(struct radv_image *image)
 static inline bool
 radv_image_can_enable_dcc_or_cmask(struct radv_image *image)
 {
+	if (image->info.samples <= 1 &&
+	    image->info.width <= 512 && image->info.height <= 512) {
+		/* Do not enable CMASK or DCC for small surfaces where the cost
+		 * of the eliminate pass can be higher than the benefit of fast
+		 * clear. RadeonSI does this, but the image threshold is
+		 * different.
+		 */
+		return false;
+	}
+
 	return image->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT &&
 	       (image->exclusive || image->queue_family_mask == 1);
 }