Mesa (master): radeonsi: set correct PA_SC_VPORT_ZMIN/ ZMAX when viewport is disabled

[Marek Olšák]

Module: Mesa
Branch: master
Commit: 76ef08f6eee6abc9eb9b66b7b183927e4aed8d64
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=76ef08f6eee6abc9eb9b66b7b183927e4aed8d64

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Oct  6 00:19:22 2017 +0200

radeonsi: set correct PA_SC_VPORT_ZMIN/ZMAX when viewport is disabled

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

---

 src/gallium/drivers/radeonsi/si_state_viewport.c | 21 +++++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_viewport.c b/src/gallium/drivers/radeonsi/si_state_viewport.c
index 0d280f6e38..0d6b7a8da8 100644
--- a/src/gallium/drivers/radeonsi/si_state_viewport.c
+++ b/src/gallium/drivers/radeonsi/si_state_viewport.c
@@ -335,12 +335,25 @@ static void si_emit_viewports(struct si_context *ctx)
 	ctx->viewports.dirty_mask = 0;
 }
 
+static inline void
+si_viewport_zmin_zmax(const struct pipe_viewport_state *vp, bool halfz,
+		      bool window_space_position, float *zmin, float *zmax)
+{
+	if (window_space_position) {
+		*zmin = 0;
+		*zmax = 1;
+		return;
+	}
+	util_viewport_zmin_zmax(vp, halfz, zmin, zmax);
+}
+
 static void si_emit_depth_ranges(struct si_context *ctx)
 {
 	struct radeon_winsys_cs *cs = ctx->b.gfx.cs;
 	struct pipe_viewport_state *states = ctx->viewports.states;
 	unsigned mask = ctx->viewports.depth_range_dirty_mask;
 	bool clip_halfz = false;
+	bool window_space = ctx->vs_disables_clipping_viewport;
 	float zmin, zmax;
 
 	if (ctx->queued.named.rasterizer)
@@ -351,7 +364,8 @@ static void si_emit_depth_ranges(struct si_context *ctx)
 		if (!(mask & 1))
 			return;
 
-		util_viewport_zmin_zmax(&states[0], clip_halfz, &zmin, &zmax);
+		si_viewport_zmin_zmax(&states[0], clip_halfz, window_space,
+				      &zmin, &zmax);
 
 		radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2);
 		radeon_emit(cs, fui(zmin));
@@ -368,7 +382,8 @@ static void si_emit_depth_ranges(struct si_context *ctx)
 		radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 +
 					   start * 4 * 2, count * 2);
 		for (i = start; i < start+count; i++) {
-			util_viewport_zmin_zmax(&states[i], clip_halfz, &zmin, &zmax);
+			si_viewport_zmin_zmax(&states[i], clip_halfz, window_space,
+					      &zmin, &zmax);
 			radeon_emit(cs, fui(zmin));
 			radeon_emit(cs, fui(zmax));
 		}
@@ -409,7 +424,9 @@ void si_update_vs_viewport_state(struct si_context *ctx)
 	if (ctx->vs_disables_clipping_viewport != vs_window_space) {
 		ctx->vs_disables_clipping_viewport = vs_window_space;
 		ctx->scissors.dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1;
+		ctx->viewports.depth_range_dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1;
 		si_mark_atom_dirty(ctx, &ctx->scissors.atom);
+		si_mark_atom_dirty(ctx, &ctx->viewports.atom);
 	}
 
 	/* Viewport index handling. */