Mesa (master): radeonsi: import r600_streamout from drivers/radeon
Marek Olšák
mareko at kemper.freedesktop.org
Mon Oct 9 14:27:21 UTC 2017
Module: Mesa
Branch: master
Commit: 65f2e33500bc648b1e9fc3a1b54938f157cf172f
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=65f2e33500bc648b1e9fc3a1b54938f157cf172f
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sat Oct 7 22:54:31 2017 +0200
radeonsi: import r600_streamout from drivers/radeon
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
---
src/gallium/drivers/radeon/Makefile.sources | 1 -
src/gallium/drivers/radeon/r600_pipe_common.c | 12 --
src/gallium/drivers/radeon/r600_pipe_common.h | 57 -------
src/gallium/drivers/radeon/r600_query.c | 4 +
src/gallium/drivers/radeonsi/Makefile.sources | 1 +
src/gallium/drivers/radeonsi/si_blit.c | 4 +-
src/gallium/drivers/radeonsi/si_descriptors.c | 20 +--
src/gallium/drivers/radeonsi/si_hw_context.c | 13 +-
src/gallium/drivers/radeonsi/si_pipe.c | 1 +
src/gallium/drivers/radeonsi/si_pipe.h | 44 ++++++
src/gallium/drivers/radeonsi/si_state.c | 4 +-
src/gallium/drivers/radeonsi/si_state.h | 11 ++
src/gallium/drivers/radeonsi/si_state_draw.c | 6 +-
src/gallium/drivers/radeonsi/si_state_shaders.c | 4 +-
.../si_state_streamout.c} | 176 +++++++++++----------
15 files changed, 181 insertions(+), 177 deletions(-)
diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources
index 5d38bb36b4..c32ebea957 100644
--- a/src/gallium/drivers/radeon/Makefile.sources
+++ b/src/gallium/drivers/radeon/Makefile.sources
@@ -8,7 +8,6 @@ C_SOURCES := \
r600_pipe_common.h \
r600_query.c \
r600_query.h \
- r600_streamout.c \
r600_test_dma.c \
r600_texture.c \
radeon_uvd.c \
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index da61580226..a6008a17d9 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -296,21 +296,10 @@ void si_preflush_suspend_features(struct r600_common_context *ctx)
/* suspend queries */
if (!LIST_IS_EMPTY(&ctx->active_queries))
si_suspend_queries(ctx);
-
- ctx->streamout.suspended = false;
- if (ctx->streamout.begin_emitted) {
- si_emit_streamout_end(ctx);
- ctx->streamout.suspended = true;
- }
}
void si_postflush_resume_features(struct r600_common_context *ctx)
{
- if (ctx->streamout.suspended) {
- ctx->streamout.append_bitmask = ctx->streamout.enabled_mask;
- si_streamout_buffers_dirty(ctx);
- }
-
/* resume queries */
if (!LIST_IS_EMPTY(&ctx->active_queries))
si_resume_queries(ctx);
@@ -647,7 +636,6 @@ bool si_common_context_init(struct r600_common_context *rctx,
rctx->b.set_device_reset_callback = r600_set_device_reset_callback;
si_init_context_texture_functions(rctx);
- si_streamout_init(rctx);
si_init_query_functions(rctx);
si_init_msaa(&rctx->b);
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index e3cb1cfb10..b620e6bfff 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -497,43 +497,6 @@ struct r600_atom {
unsigned short id;
};
-struct r600_so_target {
- struct pipe_stream_output_target b;
-
- /* The buffer where BUFFER_FILLED_SIZE is stored. */
- struct r600_resource *buf_filled_size;
- unsigned buf_filled_size_offset;
- bool buf_filled_size_valid;
-
- unsigned stride_in_dw;
-};
-
-struct r600_streamout {
- struct r600_atom begin_atom;
- bool begin_emitted;
-
- unsigned enabled_mask;
- unsigned num_targets;
- struct r600_so_target *targets[PIPE_MAX_SO_BUFFERS];
-
- unsigned append_bitmask;
- bool suspended;
-
- /* External state which comes from the vertex shader,
- * it must be set explicitly when binding a shader. */
- uint16_t *stride_in_dw;
- unsigned enabled_stream_buffers_mask; /* stream0 buffers0-3 in 4 LSB */
-
- /* The state of VGT_STRMOUT_BUFFER_(CONFIG|EN). */
- unsigned hw_enabled_mask;
-
- /* The state of VGT_STRMOUT_(CONFIG|EN). */
- struct r600_atom enable_atom;
- bool streamout_enabled;
- bool prims_gen_query_enabled;
- int num_prims_gen_queries;
-};
-
struct r600_ring {
struct radeon_winsys_cs *cs;
void (*flush)(void *ctx, unsigned flags,
@@ -578,9 +541,6 @@ struct r600_common_context {
uint64_t vram;
uint64_t gtt;
- /* States. */
- struct r600_streamout streamout;
-
/* Additional context states. */
unsigned flags; /* flush flags */
@@ -790,17 +750,6 @@ void si_init_query_functions(struct r600_common_context *rctx);
void si_suspend_queries(struct r600_common_context *ctx);
void si_resume_queries(struct r600_common_context *ctx);
-/* r600_streamout.c */
-void si_streamout_buffers_dirty(struct r600_common_context *rctx);
-void si_common_set_streamout_targets(struct pipe_context *ctx,
- unsigned num_targets,
- struct pipe_stream_output_target **targets,
- const unsigned *offset);
-void si_emit_streamout_end(struct r600_common_context *rctx);
-void si_update_prims_generated_query_state(struct r600_common_context *rctx,
- unsigned type, int diff);
-void si_streamout_init(struct r600_common_context *rctx);
-
/* r600_test_dma.c */
void si_test_dma(struct r600_common_screen *rscreen);
@@ -900,12 +849,6 @@ r600_context_add_resource_size(struct pipe_context *ctx, struct pipe_resource *r
}
}
-static inline bool r600_get_strmout_en(struct r600_common_context *rctx)
-{
- return rctx->streamout.streamout_enabled ||
- rctx->streamout.prims_gen_query_enabled;
-}
-
#define SQ_TEX_XY_FILTER_POINT 0x00
#define SQ_TEX_XY_FILTER_BILINEAR 0x01
#define SQ_TEX_XY_FILTER_ANISO_POINT 0x02
diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c
index adf3522ebb..3abfe1ebdb 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -29,6 +29,10 @@
#include "os/os_time.h"
#include "tgsi/tgsi_text.h"
+/* TODO: remove this: */
+void si_update_prims_generated_query_state(struct r600_common_context *rctx,
+ unsigned type, int diff);
+
#define R600_MAX_STREAMS 4
struct r600_hw_query_params {
diff --git a/src/gallium/drivers/radeonsi/Makefile.sources b/src/gallium/drivers/radeonsi/Makefile.sources
index ed3e52046c..63cd7a3097 100644
--- a/src/gallium/drivers/radeonsi/Makefile.sources
+++ b/src/gallium/drivers/radeonsi/Makefile.sources
@@ -30,6 +30,7 @@ C_SOURCES := \
si_state_binning.c \
si_state_draw.c \
si_state_shaders.c \
+ si_state_streamout.c \
si_state_viewport.c \
si_state.h \
si_uvd.c
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index 4806e7c941..03aa4f7737 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -58,8 +58,8 @@ static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader.cso);
util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader.cso);
util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader.cso);
- util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets,
- (struct pipe_stream_output_target**)sctx->b.streamout.targets);
+ util_blitter_save_so_targets(sctx->blitter, sctx->streamout.num_targets,
+ (struct pipe_stream_output_target**)sctx->streamout.targets);
util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
if (op & SI_SAVE_FRAGMENT_STATE) {
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index dee8e7138f..dd1f1e91b8 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -1373,11 +1373,11 @@ static void si_set_streamout_targets(struct pipe_context *ctx,
struct si_context *sctx = (struct si_context *)ctx;
struct si_buffer_resources *buffers = &sctx->rw_buffers;
struct si_descriptors *descs = &sctx->descriptors[SI_DESCS_RW_BUFFERS];
- unsigned old_num_targets = sctx->b.streamout.num_targets;
+ unsigned old_num_targets = sctx->streamout.num_targets;
unsigned i, bufidx;
/* We are going to unbind the buffers. Mark which caches need to be flushed. */
- if (sctx->b.streamout.num_targets && sctx->b.streamout.begin_emitted) {
+ if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) {
/* Since streamout uses vector writes which go through TC L2
* and most other clients can use TC L2 as well, we don't need
* to flush it.
@@ -1387,9 +1387,9 @@ static void si_set_streamout_targets(struct pipe_context *ctx,
* cases. Thus, flag the TC L2 dirtiness in the resource and
* handle it at draw call time.
*/
- for (i = 0; i < sctx->b.streamout.num_targets; i++)
- if (sctx->b.streamout.targets[i])
- r600_resource(sctx->b.streamout.targets[i]->b.buffer)->TC_L2_dirty = true;
+ for (i = 0; i < sctx->streamout.num_targets; i++)
+ if (sctx->streamout.targets[i])
+ r600_resource(sctx->streamout.targets[i]->b.buffer)->TC_L2_dirty = true;
/* Invalidate the scalar cache in case a streamout buffer is
* going to be used as a constant buffer.
@@ -1650,11 +1650,11 @@ static void si_rebind_buffer(struct pipe_context *ctx, struct pipe_resource *buf
true);
/* Update the streamout state. */
- if (sctx->b.streamout.begin_emitted)
- si_emit_streamout_end(&sctx->b);
- sctx->b.streamout.append_bitmask =
- sctx->b.streamout.enabled_mask;
- si_streamout_buffers_dirty(&sctx->b);
+ if (sctx->streamout.begin_emitted)
+ si_emit_streamout_end(sctx);
+ sctx->streamout.append_bitmask =
+ sctx->streamout.enabled_mask;
+ si_streamout_buffers_dirty(sctx);
}
}
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index 72da54e5b4..317b50c8aa 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -100,6 +100,12 @@ void si_context_gfx_flush(void *context, unsigned flags,
si_preflush_suspend_features(&ctx->b);
+ ctx->streamout.suspended = false;
+ if (ctx->streamout.begin_emitted) {
+ si_emit_streamout_end(ctx);
+ ctx->streamout.suspended = true;
+ }
+
ctx->b.flags |= SI_CONTEXT_CS_PARTIAL_FLUSH |
SI_CONTEXT_PS_PARTIAL_FLUSH;
@@ -243,7 +249,7 @@ void si_begin_new_cs(struct si_context *ctx)
si_mark_atom_dirty(ctx, &ctx->dpbb_state);
si_mark_atom_dirty(ctx, &ctx->stencil_ref.atom);
si_mark_atom_dirty(ctx, &ctx->spi_map);
- si_mark_atom_dirty(ctx, &ctx->b.streamout.enable_atom);
+ si_mark_atom_dirty(ctx, &ctx->streamout.enable_atom);
si_mark_atom_dirty(ctx, &ctx->b.render_cond_atom);
si_all_descriptors_begin_new_cs(ctx);
si_all_resident_buffers_begin_new_cs(ctx);
@@ -260,6 +266,11 @@ void si_begin_new_cs(struct si_context *ctx)
&ctx->scratch_buffer->b.b);
}
+ if (ctx->streamout.suspended) {
+ ctx->streamout.append_bitmask = ctx->streamout.enabled_mask;
+ si_streamout_buffers_dirty(ctx);
+ }
+
si_postflush_resume_features(&ctx->b);
assert(!ctx->b.gfx.cs->prev_dw);
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index d0b90e732a..b9840ad8e3 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -205,6 +205,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen,
si_init_compute_functions(sctx);
si_init_cp_dma_functions(sctx);
si_init_debug_functions(sctx);
+ si_init_streamout_functions(sctx);
if (sscreen->b.info.has_hw_decode) {
sctx->b.b.create_video_codec = si_uvd_create_decoder;
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index cf36100dc9..4e54b7ef16 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -255,6 +255,43 @@ struct si_sample_mask {
uint16_t sample_mask;
};
+struct si_streamout_target {
+ struct pipe_stream_output_target b;
+
+ /* The buffer where BUFFER_FILLED_SIZE is stored. */
+ struct r600_resource *buf_filled_size;
+ unsigned buf_filled_size_offset;
+ bool buf_filled_size_valid;
+
+ unsigned stride_in_dw;
+};
+
+struct si_streamout {
+ struct r600_atom begin_atom;
+ bool begin_emitted;
+
+ unsigned enabled_mask;
+ unsigned num_targets;
+ struct si_streamout_target *targets[PIPE_MAX_SO_BUFFERS];
+
+ unsigned append_bitmask;
+ bool suspended;
+
+ /* External state which comes from the vertex shader,
+ * it must be set explicitly when binding a shader. */
+ uint16_t *stride_in_dw;
+ unsigned enabled_stream_buffers_mask; /* stream0 buffers0-3 in 4 LSB */
+
+ /* The state of VGT_STRMOUT_BUFFER_(CONFIG|EN). */
+ unsigned hw_enabled_mask;
+
+ /* The state of VGT_STRMOUT_(CONFIG|EN). */
+ struct r600_atom enable_atom;
+ bool streamout_enabled;
+ bool prims_gen_query_enabled;
+ int num_prims_gen_queries;
+};
+
/* A shader state consists of the shader selector, which is a constant state
* object shared by multiple contexts and shouldn't be modified, and
* the current shader variant selected for this context.
@@ -359,6 +396,7 @@ struct si_context {
struct si_stencil_ref stencil_ref;
struct r600_atom spi_map;
struct si_scissors scissors;
+ struct si_streamout streamout;
struct si_viewports viewports;
/* Precomputed states. */
@@ -644,6 +682,12 @@ static inline struct si_shader* si_get_vs_state(struct si_context *sctx)
return vs->current ? vs->current : NULL;
}
+static inline bool si_get_strmout_en(struct si_context *sctx)
+{
+ return sctx->streamout.streamout_enabled ||
+ sctx->streamout.prims_gen_query_enabled;
+}
+
static inline unsigned
si_optimal_tcc_alignment(struct si_context *sctx, unsigned upload_size)
{
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 99c3ca3688..82f3962a6c 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -4407,8 +4407,8 @@ static void si_init_config(struct si_context *sctx);
void si_init_state_functions(struct si_context *sctx)
{
si_init_external_atom(sctx, &sctx->b.render_cond_atom, &sctx->atoms.s.render_cond);
- si_init_external_atom(sctx, &sctx->b.streamout.begin_atom, &sctx->atoms.s.streamout_begin);
- si_init_external_atom(sctx, &sctx->b.streamout.enable_atom, &sctx->atoms.s.streamout_enable);
+ si_init_external_atom(sctx, &sctx->streamout.begin_atom, &sctx->atoms.s.streamout_begin);
+ si_init_external_atom(sctx, &sctx->streamout.enable_atom, &sctx->atoms.s.streamout_enable);
si_init_external_atom(sctx, &sctx->scissors.atom, &sctx->atoms.s.scissors);
si_init_external_atom(sctx, &sctx->viewports.atom, &sctx->atoms.s.viewports);
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 03e2a174d2..9d29878e30 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -423,6 +423,17 @@ void si_draw_rectangle(struct blitter_context *blitter,
const union blitter_attrib *attrib);
void si_trace_emit(struct si_context *sctx);
+/* si_state_streamout.c */
+void si_streamout_buffers_dirty(struct si_context *sctx);
+void si_common_set_streamout_targets(struct pipe_context *ctx,
+ unsigned num_targets,
+ struct pipe_stream_output_target **targets,
+ const unsigned *offset);
+void si_emit_streamout_end(struct si_context *sctx);
+void si_update_prims_generated_query_state(struct si_context *sctx,
+ unsigned type, int diff);
+void si_init_streamout_functions(struct si_context *sctx);
+
static inline unsigned
si_tile_mode_index(struct r600_texture *rtex, unsigned level, bool stencil)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 6eab4cb47d..9468fde523 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -652,8 +652,8 @@ static void si_emit_draw_packets(struct si_context *sctx,
uint64_t index_va = 0;
if (info->count_from_stream_output) {
- struct r600_so_target *t =
- (struct r600_so_target*)info->count_from_stream_output;
+ struct si_streamout_target *t =
+ (struct si_streamout_target*)info->count_from_stream_output;
uint64_t va = t->buf_filled_size->gpu_address +
t->buf_filled_size_offset;
@@ -1486,7 +1486,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
if ((sctx->b.family == CHIP_HAWAII ||
sctx->b.family == CHIP_TONGA ||
sctx->b.family == CHIP_FIJI) &&
- r600_get_strmout_en(&sctx->b)) {
+ si_get_strmout_en(sctx)) {
sctx->b.flags |= SI_CONTEXT_VGT_STREAMOUT_SYNC;
}
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index dbaa2dcd5c..9340328a72 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -2252,9 +2252,9 @@ static void si_update_streamout_state(struct si_context *sctx)
if (!shader_with_so)
return;
- sctx->b.streamout.enabled_stream_buffers_mask =
+ sctx->streamout.enabled_stream_buffers_mask =
shader_with_so->enabled_streamout_buffer_mask;
- sctx->b.streamout.stride_in_dw = shader_with_so->so.stride;
+ sctx->streamout.stride_in_dw = shader_with_so->so.stride;
}
static void si_update_clip_regs(struct si_context *sctx,
diff --git a/src/gallium/drivers/radeon/r600_streamout.c b/src/gallium/drivers/radeonsi/si_state_streamout.c
similarity index 58%
rename from src/gallium/drivers/radeon/r600_streamout.c
rename to src/gallium/drivers/radeonsi/si_state_streamout.c
index 5c14b1bc2e..42a83d4bd7 100644
--- a/src/gallium/drivers/radeon/r600_streamout.c
+++ b/src/gallium/drivers/radeonsi/si_state_streamout.c
@@ -24,29 +24,30 @@
*
*/
-#include "r600_pipe_common.h"
-#include "r600_cs.h"
+#include "si_pipe.h"
+#include "si_state.h"
+#include "radeon/r600_cs.h"
#include "util/u_memory.h"
-static void r600_set_streamout_enable(struct r600_common_context *rctx, bool enable);
+static void si_set_streamout_enable(struct si_context *sctx, bool enable);
static struct pipe_stream_output_target *
-r600_create_so_target(struct pipe_context *ctx,
- struct pipe_resource *buffer,
- unsigned buffer_offset,
- unsigned buffer_size)
+si_create_so_target(struct pipe_context *ctx,
+ struct pipe_resource *buffer,
+ unsigned buffer_offset,
+ unsigned buffer_size)
{
- struct r600_common_context *rctx = (struct r600_common_context *)ctx;
- struct r600_so_target *t;
+ struct si_context *sctx = (struct si_context *)ctx;
+ struct si_streamout_target *t;
struct r600_resource *rbuffer = (struct r600_resource*)buffer;
- t = CALLOC_STRUCT(r600_so_target);
+ t = CALLOC_STRUCT(si_streamout_target);
if (!t) {
return NULL;
}
- u_suballocator_alloc(rctx->allocator_zeroed_memory, 4, 4,
+ u_suballocator_alloc(sctx->b.allocator_zeroed_memory, 4, 4,
&t->buf_filled_size_offset,
(struct pipe_resource**)&t->buf_filled_size);
if (!t->buf_filled_size) {
@@ -65,22 +66,22 @@ r600_create_so_target(struct pipe_context *ctx,
return &t->b;
}
-static void r600_so_target_destroy(struct pipe_context *ctx,
- struct pipe_stream_output_target *target)
+static void si_so_target_destroy(struct pipe_context *ctx,
+ struct pipe_stream_output_target *target)
{
- struct r600_so_target *t = (struct r600_so_target*)target;
+ struct si_streamout_target *t = (struct si_streamout_target*)target;
pipe_resource_reference(&t->b.buffer, NULL);
r600_resource_reference(&t->buf_filled_size, NULL);
FREE(t);
}
-void si_streamout_buffers_dirty(struct r600_common_context *rctx)
+void si_streamout_buffers_dirty(struct si_context *sctx)
{
- if (!rctx->streamout.enabled_mask)
+ if (!sctx->streamout.enabled_mask)
return;
- rctx->set_atom_dirty(rctx, &rctx->streamout.begin_atom, true);
- r600_set_streamout_enable(rctx, true);
+ si_mark_atom_dirty(sctx, &sctx->streamout.begin_atom);
+ si_set_streamout_enable(sctx, true);
}
void si_common_set_streamout_targets(struct pipe_context *ctx,
@@ -88,18 +89,18 @@ void si_common_set_streamout_targets(struct pipe_context *ctx,
struct pipe_stream_output_target **targets,
const unsigned *offsets)
{
- struct r600_common_context *rctx = (struct r600_common_context *)ctx;
+ struct si_context *sctx = (struct si_context *)ctx;
unsigned i;
unsigned enabled_mask = 0, append_bitmask = 0;
/* Stop streamout. */
- if (rctx->streamout.num_targets && rctx->streamout.begin_emitted) {
- si_emit_streamout_end(rctx);
+ if (sctx->streamout.num_targets && sctx->streamout.begin_emitted) {
+ si_emit_streamout_end(sctx);
}
/* Set the new targets. */
for (i = 0; i < num_targets; i++) {
- pipe_so_target_reference((struct pipe_stream_output_target**)&rctx->streamout.targets[i], targets[i]);
+ pipe_so_target_reference((struct pipe_stream_output_target**)&sctx->streamout.targets[i], targets[i]);
if (!targets[i])
continue;
@@ -108,30 +109,30 @@ void si_common_set_streamout_targets(struct pipe_context *ctx,
if (offsets[i] == ((unsigned)-1))
append_bitmask |= 1 << i;
}
- for (; i < rctx->streamout.num_targets; i++) {
- pipe_so_target_reference((struct pipe_stream_output_target**)&rctx->streamout.targets[i], NULL);
+ for (; i < sctx->streamout.num_targets; i++) {
+ pipe_so_target_reference((struct pipe_stream_output_target**)&sctx->streamout.targets[i], NULL);
}
- rctx->streamout.enabled_mask = enabled_mask;
+ sctx->streamout.enabled_mask = enabled_mask;
- rctx->streamout.num_targets = num_targets;
- rctx->streamout.append_bitmask = append_bitmask;
+ sctx->streamout.num_targets = num_targets;
+ sctx->streamout.append_bitmask = append_bitmask;
if (num_targets) {
- si_streamout_buffers_dirty(rctx);
+ si_streamout_buffers_dirty(sctx);
} else {
- rctx->set_atom_dirty(rctx, &rctx->streamout.begin_atom, false);
- r600_set_streamout_enable(rctx, false);
+ si_set_atom_dirty(sctx, &sctx->streamout.begin_atom, false);
+ si_set_streamout_enable(sctx, false);
}
}
-static void r600_flush_vgt_streamout(struct r600_common_context *rctx)
+static void si_flush_vgt_streamout(struct si_context *sctx)
{
- struct radeon_winsys_cs *cs = rctx->gfx.cs;
+ struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
unsigned reg_strmout_cntl;
/* The register is at different places on different ASICs. */
- if (rctx->chip_class >= CIK) {
+ if (sctx->b.chip_class >= CIK) {
reg_strmout_cntl = R_0300FC_CP_STRMOUT_CNTL;
radeon_set_uconfig_reg(cs, reg_strmout_cntl, 0);
} else {
@@ -151,16 +152,17 @@ static void r600_flush_vgt_streamout(struct r600_common_context *rctx)
radeon_emit(cs, 4); /* poll interval */
}
-static void r600_emit_streamout_begin(struct r600_common_context *rctx, struct r600_atom *atom)
+static void si_emit_streamout_begin(struct r600_common_context *rctx, struct r600_atom *atom)
{
- struct radeon_winsys_cs *cs = rctx->gfx.cs;
- struct r600_so_target **t = rctx->streamout.targets;
- uint16_t *stride_in_dw = rctx->streamout.stride_in_dw;
+ struct si_context *sctx = (struct si_context*)rctx;
+ struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
+ struct si_streamout_target **t = sctx->streamout.targets;
+ uint16_t *stride_in_dw = sctx->streamout.stride_in_dw;
unsigned i;
- r600_flush_vgt_streamout(rctx);
+ si_flush_vgt_streamout(sctx);
- for (i = 0; i < rctx->streamout.num_targets; i++) {
+ for (i = 0; i < sctx->streamout.num_targets; i++) {
if (!t[i])
continue;
@@ -174,7 +176,7 @@ static void r600_emit_streamout_begin(struct r600_common_context *rctx, struct r
t[i]->b.buffer_size) >> 2); /* BUFFER_SIZE (in DW) */
radeon_emit(cs, stride_in_dw[i]); /* VTX_STRIDE (in DW) */
- if (rctx->streamout.append_bitmask & (1 << i) && t[i]->buf_filled_size_valid) {
+ if (sctx->streamout.append_bitmask & (1 << i) && t[i]->buf_filled_size_valid) {
uint64_t va = t[i]->buf_filled_size->gpu_address +
t[i]->buf_filled_size_offset;
@@ -187,7 +189,7 @@ static void r600_emit_streamout_begin(struct r600_common_context *rctx, struct r
radeon_emit(cs, va); /* src address lo */
radeon_emit(cs, va >> 32); /* src address hi */
- r600_emit_reloc(rctx, &rctx->gfx, t[i]->buf_filled_size,
+ r600_emit_reloc(&sctx->b, &sctx->b.gfx, t[i]->buf_filled_size,
RADEON_USAGE_READ, RADEON_PRIO_SO_FILLED_SIZE);
} else {
/* Start from the beginning. */
@@ -201,19 +203,19 @@ static void r600_emit_streamout_begin(struct r600_common_context *rctx, struct r
}
}
- rctx->streamout.begin_emitted = true;
+ sctx->streamout.begin_emitted = true;
}
-void si_emit_streamout_end(struct r600_common_context *rctx)
+void si_emit_streamout_end(struct si_context *sctx)
{
- struct radeon_winsys_cs *cs = rctx->gfx.cs;
- struct r600_so_target **t = rctx->streamout.targets;
+ struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
+ struct si_streamout_target **t = sctx->streamout.targets;
unsigned i;
uint64_t va;
- r600_flush_vgt_streamout(rctx);
+ si_flush_vgt_streamout(sctx);
- for (i = 0; i < rctx->streamout.num_targets; i++) {
+ for (i = 0; i < sctx->streamout.num_targets; i++) {
if (!t[i])
continue;
@@ -227,7 +229,7 @@ void si_emit_streamout_end(struct r600_common_context *rctx)
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, 0); /* unused */
- r600_emit_reloc(rctx, &rctx->gfx, t[i]->buf_filled_size,
+ r600_emit_reloc(&sctx->b, &sctx->b.gfx, t[i]->buf_filled_size,
RADEON_USAGE_WRITE, RADEON_PRIO_SO_FILLED_SIZE);
/* Zero the buffer size. The counters (primitives generated,
@@ -239,8 +241,8 @@ void si_emit_streamout_end(struct r600_common_context *rctx)
t[i]->buf_filled_size_valid = true;
}
- rctx->streamout.begin_emitted = false;
- rctx->flags |= R600_CONTEXT_STREAMOUT_FLUSH;
+ sctx->streamout.begin_emitted = false;
+ sctx->b.flags |= R600_CONTEXT_STREAMOUT_FLUSH;
}
/* STREAMOUT CONFIG DERIVED STATE
@@ -250,61 +252,61 @@ void si_emit_streamout_end(struct r600_common_context *rctx)
* are no buffers bound.
*/
-static void r600_emit_streamout_enable(struct r600_common_context *rctx,
- struct r600_atom *atom)
+static void si_emit_streamout_enable(struct r600_common_context *rctx,
+ struct r600_atom *atom)
{
- radeon_set_context_reg_seq(rctx->gfx.cs, R_028B94_VGT_STRMOUT_CONFIG, 2);
- radeon_emit(rctx->gfx.cs,
- S_028B94_STREAMOUT_0_EN(r600_get_strmout_en(rctx)) |
+ struct si_context *sctx = (struct si_context*)rctx;
+
+ radeon_set_context_reg_seq(sctx->b.gfx.cs, R_028B94_VGT_STRMOUT_CONFIG, 2);
+ radeon_emit(sctx->b.gfx.cs,
+ S_028B94_STREAMOUT_0_EN(si_get_strmout_en(sctx)) |
S_028B94_RAST_STREAM(0) |
- S_028B94_STREAMOUT_1_EN(r600_get_strmout_en(rctx)) |
- S_028B94_STREAMOUT_2_EN(r600_get_strmout_en(rctx)) |
- S_028B94_STREAMOUT_3_EN(r600_get_strmout_en(rctx)));
- radeon_emit(rctx->gfx.cs,
- rctx->streamout.hw_enabled_mask &
- rctx->streamout.enabled_stream_buffers_mask);
+ S_028B94_STREAMOUT_1_EN(si_get_strmout_en(sctx)) |
+ S_028B94_STREAMOUT_2_EN(si_get_strmout_en(sctx)) |
+ S_028B94_STREAMOUT_3_EN(si_get_strmout_en(sctx)));
+ radeon_emit(sctx->b.gfx.cs,
+ sctx->streamout.hw_enabled_mask &
+ sctx->streamout.enabled_stream_buffers_mask);
}
-static void r600_set_streamout_enable(struct r600_common_context *rctx, bool enable)
+static void si_set_streamout_enable(struct si_context *sctx, bool enable)
{
- bool old_strmout_en = r600_get_strmout_en(rctx);
- unsigned old_hw_enabled_mask = rctx->streamout.hw_enabled_mask;
+ bool old_strmout_en = si_get_strmout_en(sctx);
+ unsigned old_hw_enabled_mask = sctx->streamout.hw_enabled_mask;
- rctx->streamout.streamout_enabled = enable;
+ sctx->streamout.streamout_enabled = enable;
- rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask |
- (rctx->streamout.enabled_mask << 4) |
- (rctx->streamout.enabled_mask << 8) |
- (rctx->streamout.enabled_mask << 12);
+ sctx->streamout.hw_enabled_mask = sctx->streamout.enabled_mask |
+ (sctx->streamout.enabled_mask << 4) |
+ (sctx->streamout.enabled_mask << 8) |
+ (sctx->streamout.enabled_mask << 12);
- if ((old_strmout_en != r600_get_strmout_en(rctx)) ||
- (old_hw_enabled_mask != rctx->streamout.hw_enabled_mask)) {
- rctx->set_atom_dirty(rctx, &rctx->streamout.enable_atom, true);
- }
+ if ((old_strmout_en != si_get_strmout_en(sctx)) ||
+ (old_hw_enabled_mask != sctx->streamout.hw_enabled_mask))
+ si_mark_atom_dirty(sctx, &sctx->streamout.enable_atom);
}
-void si_update_prims_generated_query_state(struct r600_common_context *rctx,
+void si_update_prims_generated_query_state(struct si_context *sctx,
unsigned type, int diff)
{
if (type == PIPE_QUERY_PRIMITIVES_GENERATED) {
- bool old_strmout_en = r600_get_strmout_en(rctx);
+ bool old_strmout_en = si_get_strmout_en(sctx);
- rctx->streamout.num_prims_gen_queries += diff;
- assert(rctx->streamout.num_prims_gen_queries >= 0);
+ sctx->streamout.num_prims_gen_queries += diff;
+ assert(sctx->streamout.num_prims_gen_queries >= 0);
- rctx->streamout.prims_gen_query_enabled =
- rctx->streamout.num_prims_gen_queries != 0;
+ sctx->streamout.prims_gen_query_enabled =
+ sctx->streamout.num_prims_gen_queries != 0;
- if (old_strmout_en != r600_get_strmout_en(rctx)) {
- rctx->set_atom_dirty(rctx, &rctx->streamout.enable_atom, true);
- }
+ if (old_strmout_en != si_get_strmout_en(sctx))
+ si_mark_atom_dirty(sctx, &sctx->streamout.enable_atom);
}
}
-void si_streamout_init(struct r600_common_context *rctx)
+void si_init_streamout_functions(struct si_context *sctx)
{
- rctx->b.create_stream_output_target = r600_create_so_target;
- rctx->b.stream_output_target_destroy = r600_so_target_destroy;
- rctx->streamout.begin_atom.emit = r600_emit_streamout_begin;
- rctx->streamout.enable_atom.emit = r600_emit_streamout_enable;
+ sctx->b.b.create_stream_output_target = si_create_so_target;
+ sctx->b.b.stream_output_target_destroy = si_so_target_destroy;
+ sctx->streamout.begin_atom.emit = si_emit_streamout_begin;
+ sctx->streamout.enable_atom.emit = si_emit_streamout_enable;
}
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