Mesa (master): radv: add radv_emit_draw_registers()
Samuel Pitoiset
hakzsam at kemper.freedesktop.org
Fri Oct 20 09:23:19 UTC 2017
Module: Mesa
Branch: master
Commit: 93207a8e896042ee3877c06ae1af4dc41b99f888
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=93207a8e896042ee3877c06ae1af4dc41b99f888
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Tue Oct 10 13:29:58 2017 +0200
radv: add radv_emit_draw_registers()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
---
src/amd/vulkan/radv_cmd_buffer.c | 46 +++++++++++++++++++++++++++++-----------
1 file changed, 34 insertions(+), 12 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index f82cd37675..a682c5e755 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1793,13 +1793,43 @@ radv_cmd_buffer_update_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer)
}
static void
+radv_emit_draw_registers(struct radv_cmd_buffer *cmd_buffer, bool indexed_draw,
+ bool instanced_draw, bool indirect_draw,
+ uint32_t draw_vertex_count)
+{
+ struct radeon_info *info = &cmd_buffer->device->physical_device->rad_info;
+ struct radv_cmd_state *state = &cmd_buffer->state;
+ struct radeon_winsys_cs *cs = cmd_buffer->cs;
+ uint32_t ia_multi_vgt_param;
+
+ /* Draw state. */
+ ia_multi_vgt_param =
+ si_get_ia_multi_vgt_param(cmd_buffer, instanced_draw,
+ indirect_draw, draw_vertex_count);
+
+ if (state->last_ia_multi_vgt_param != ia_multi_vgt_param) {
+ if (info->chip_class >= GFX9) {
+ radeon_set_uconfig_reg_idx(cs,
+ R_030960_IA_MULTI_VGT_PARAM,
+ 4, ia_multi_vgt_param);
+ } else if (info->chip_class >= CIK) {
+ radeon_set_context_reg_idx(cs,
+ R_028AA8_IA_MULTI_VGT_PARAM,
+ 1, ia_multi_vgt_param);
+ } else {
+ radeon_set_context_reg(cs, R_028AA8_IA_MULTI_VGT_PARAM,
+ ia_multi_vgt_param);
+ }
+ state->last_ia_multi_vgt_param = ia_multi_vgt_param;
+ }
+}
+
+static void
radv_cmd_buffer_flush_state(struct radv_cmd_buffer *cmd_buffer,
bool indexed_draw, bool instanced_draw,
bool indirect_draw,
uint32_t draw_vertex_count)
{
- uint32_t ia_multi_vgt_param;
-
MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws,
cmd_buffer->cs, 4096);
@@ -1824,16 +1854,8 @@ radv_cmd_buffer_flush_state(struct radv_cmd_buffer *cmd_buffer,
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_INDEX_BUFFER;
}
- ia_multi_vgt_param = si_get_ia_multi_vgt_param(cmd_buffer, instanced_draw, indirect_draw, draw_vertex_count);
- if (cmd_buffer->state.last_ia_multi_vgt_param != ia_multi_vgt_param) {
- if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9)
- radeon_set_uconfig_reg_idx(cmd_buffer->cs, R_030960_IA_MULTI_VGT_PARAM, 4, ia_multi_vgt_param);
- else if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK)
- radeon_set_context_reg_idx(cmd_buffer->cs, R_028AA8_IA_MULTI_VGT_PARAM, 1, ia_multi_vgt_param);
- else
- radeon_set_context_reg(cmd_buffer->cs, R_028AA8_IA_MULTI_VGT_PARAM, ia_multi_vgt_param);
- cmd_buffer->state.last_ia_multi_vgt_param = ia_multi_vgt_param;
- }
+ radv_emit_draw_registers(cmd_buffer, indexed_draw, instanced_draw,
+ indirect_draw, draw_vertex_count);
radv_cmd_buffer_flush_dynamic_state(cmd_buffer);
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