Mesa (master): i965: Rename brw_inst' s functions that access the 3src register type
Matt Turner
mattst88 at kemper.freedesktop.org
Fri Oct 20 22:00:25 UTC 2017
Module: Mesa
Branch: master
Commit: e15dac319b6cde33adc203fea2e9e31f966d20ca
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e15dac319b6cde33adc203fea2e9e31f966d20ca
Author: Matt Turner <mattst88 at gmail.com>
Date: Fri Aug 25 10:43:38 2017 -0700
i965: Rename brw_inst's functions that access the 3src register type
Put hw_ in the name so that it's clear these are the hardware encodings.
Similar to commit 9fb832332868 ("i965: Rename brw_inst's functions that
access the register type")
Reviewed-by: Scott D Phillips <scott.d.phillips at intel.com>
---
src/intel/compiler/brw_disasm.c | 16 ++++++++--------
src/intel/compiler/brw_eu_emit.c | 16 ++++++++--------
src/intel/compiler/brw_inst.h | 4 ++--
3 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
index b70e8a5186..e91961028e 100644
--- a/src/intel/compiler/brw_disasm.c
+++ b/src/intel/compiler/brw_disasm.c
@@ -766,7 +766,7 @@ dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
uint32_t reg_file;
enum brw_reg_type type =
brw_hw_3src_type_to_reg_type(devinfo,
- brw_inst_3src_a16_dst_type(devinfo, inst));
+ brw_inst_3src_a16_dst_hw_type(devinfo, inst));
unsigned dst_subreg_nr =
brw_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4 /
brw_reg_type_to_size(type);
@@ -785,7 +785,7 @@ dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
err |= control(file, "writemask", writemask,
brw_inst_3src_a16_dst_writemask(devinfo, inst), NULL);
err |= control(file, "dest reg encoding", three_source_reg_encoding,
- brw_inst_3src_a16_dst_type(devinfo, inst), NULL);
+ brw_inst_3src_a16_dst_hw_type(devinfo, inst), NULL);
return 0;
}
@@ -936,7 +936,7 @@ src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
int err = 0;
enum brw_reg_type type =
brw_hw_3src_type_to_reg_type(devinfo,
- brw_inst_3src_a16_src_type(devinfo, inst));
+ brw_inst_3src_a16_src_hw_type(devinfo, inst));
unsigned src0_subreg_nr =
brw_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4 /
brw_reg_type_to_size(type);
@@ -958,7 +958,7 @@ src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
err |= src_swizzle(file, brw_inst_3src_a16_src0_swizzle(devinfo, inst));
}
err |= control(file, "src da16 reg type", three_source_reg_encoding,
- brw_inst_3src_a16_src_type(devinfo, inst), NULL);
+ brw_inst_3src_a16_src_hw_type(devinfo, inst), NULL);
return err;
}
@@ -968,7 +968,7 @@ src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
int err = 0;
enum brw_reg_type type =
brw_hw_3src_type_to_reg_type(devinfo,
- brw_inst_3src_a16_src_type(devinfo, inst));
+ brw_inst_3src_a16_src_hw_type(devinfo, inst));
unsigned src1_subreg_nr =
brw_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4 /
brw_reg_type_to_size(type);
@@ -990,7 +990,7 @@ src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
err |= src_swizzle(file, brw_inst_3src_a16_src1_swizzle(devinfo, inst));
}
err |= control(file, "src da16 reg type", three_source_reg_encoding,
- brw_inst_3src_a16_src_type(devinfo, inst), NULL);
+ brw_inst_3src_a16_src_hw_type(devinfo, inst), NULL);
return err;
}
@@ -1001,7 +1001,7 @@ src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
int err = 0;
enum brw_reg_type type =
brw_hw_3src_type_to_reg_type(devinfo,
- brw_inst_3src_a16_src_type(devinfo, inst));
+ brw_inst_3src_a16_src_hw_type(devinfo, inst));
unsigned src2_subreg_nr =
brw_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4 /
brw_reg_type_to_size(type);
@@ -1023,7 +1023,7 @@ src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
err |= src_swizzle(file, brw_inst_3src_a16_src2_swizzle(devinfo, inst));
}
err |= control(file, "src da16 reg type", three_source_reg_encoding,
- brw_inst_3src_a16_src_type(devinfo, inst), NULL);
+ brw_inst_3src_a16_src_hw_type(devinfo, inst), NULL);
return err;
}
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index f842c625be..5fd9a2b3fe 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -738,20 +738,20 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
*/
switch (dest.type) {
case BRW_REGISTER_TYPE_F:
- brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_F);
- brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_F);
+ brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_F);
+ brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_F);
break;
case BRW_REGISTER_TYPE_DF:
- brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_DF);
- brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_DF);
+ brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_DF);
+ brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_DF);
break;
case BRW_REGISTER_TYPE_D:
- brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_D);
- brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_D);
+ brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_D);
+ brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_D);
break;
case BRW_REGISTER_TYPE_UD:
- brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_UD);
- brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_UD);
+ brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_UD);
+ brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_UD);
break;
default:
unreachable("not reached");
diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h
index 4b0414dc65..e0bc2c1ceb 100644
--- a/src/intel/compiler/brw_inst.h
+++ b/src/intel/compiler/brw_inst.h
@@ -214,8 +214,8 @@ F(3src_dst_reg_nr, 63, 56) /* same in align1 */
F(3src_a16_dst_subreg_nr, 55, 53)
F(3src_a16_dst_writemask, 52, 49)
F8(3src_a16_nib_ctrl, 47, 47, 11, 11) /* only exists on IVB+ */
-F8(3src_a16_dst_type, 45, 44, 48, 46) /* only exists on IVB+ */
-F8(3src_a16_src_type, 43, 42, 45, 43)
+F8(3src_a16_dst_hw_type, 45, 44, 48, 46) /* only exists on IVB+ */
+F8(3src_a16_src_hw_type, 43, 42, 45, 43)
F8(3src_src2_negate, 41, 41, 42, 42)
F8(3src_src2_abs, 40, 40, 41, 41)
F8(3src_src1_negate, 39, 39, 40, 40)
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