Mesa (master): intel/compiler: implement 8-bit constant load

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Module: Mesa
Branch: master
Commit: 471bce568916f4ade0e2c1cf975c3fe6045ebd9f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=471bce568916f4ade0e2c1cf975c3fe6045ebd9f

Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Fri Jul 27 13:38:39 2018 +0200

intel/compiler: implement 8-bit constant load

Fixes VK-GL-CTS CL#2567

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

---

 src/intel/compiler/brw_fs_nir.cpp | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 2c8595b973..6e9a5829d3 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1587,6 +1587,11 @@ fs_visitor::nir_emit_load_const(const fs_builder &bld,
    fs_reg reg = bld.vgrf(reg_type, instr->def.num_components);
 
    switch (instr->def.bit_size) {
+   case 8:
+      for (unsigned i = 0; i < instr->def.num_components; i++)
+         bld.MOV(offset(reg, bld, i), setup_imm_b(bld, instr->value.i8[i]));
+      break;
+
    case 16:
       for (unsigned i = 0; i < instr->def.num_components; i++)
          bld.MOV(offset(reg, bld, i), brw_imm_w(instr->value.i16[i]));