Mesa (master): virgl: add ARB_shader_clock support

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Module: Mesa
Branch: master
Commit: fe0a3a45bb4875e6c17916b5f2a6652e1691e129
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe0a3a45bb4875e6c17916b5f2a6652e1691e129

Author: Dave Airlie <airlied at redhat.com>
Date:   Tue Jul 31 08:02:59 2018 +1000

virgl: add ARB_shader_clock support

Reviewed-by: Erik Faye-Lund <erik.faye-lund at collabora.com>

---

 docs/features.txt                        | 2 +-
 src/gallium/drivers/virgl/virgl_hw.h     | 1 +
 src/gallium/drivers/virgl/virgl_screen.c | 3 ++-
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/docs/features.txt b/docs/features.txt
index 37614470a1..613cc148f4 100644
--- a/docs/features.txt
+++ b/docs/features.txt
@@ -308,7 +308,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
   GL_ARB_sample_locations                               DONE (nvc0)
   GL_ARB_seamless_cubemap_per_texture                   DONE (freedreno, i965, nvc0, radeonsi, r600, softpipe, swr, virgl)
   GL_ARB_shader_ballot                                  DONE (i965/gen8+, nvc0, radeonsi)
-  GL_ARB_shader_clock                                   DONE (i965/gen7+, nv50, nvc0, r600, radeonsi)
+  GL_ARB_shader_clock                                   DONE (i965/gen7+, nv50, nvc0, r600, radeonsi, virgl)
   GL_ARB_shader_stencil_export                          DONE (i965/gen9+, r600, radeonsi, softpipe, llvmpipe, swr, virgl)
   GL_ARB_shader_viewport_layer_array                    DONE (i965/gen6+, nvc0, radeonsi)
   GL_ARB_sparse_buffer                                  DONE (radeonsi/CIK+)
diff --git a/src/gallium/drivers/virgl/virgl_hw.h b/src/gallium/drivers/virgl/virgl_hw.h
index 70b0b2416a..1df9d0e77d 100644
--- a/src/gallium/drivers/virgl/virgl_hw.h
+++ b/src/gallium/drivers/virgl/virgl_hw.h
@@ -228,6 +228,7 @@ enum virgl_formats {
 #define VIRGL_CAP_FB_NO_ATTACH         (1 << 8)
 #define VIRGL_CAP_ROBUST_BUFFER_ACCESS (1 << 9)
 #define VIRGL_CAP_TGSI_FBFETCH         (1 << 10)
+#define VIRGL_CAP_SHADER_CLOCK         (1 << 11)
 
 /* virgl bind flags - these are compatible with mesa 10.5 gallium.
  * but are fixed, no other should be passed to virgl either.
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index e17d257fab..421fde5249 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -231,6 +231,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
    case PIPE_CAP_TGSI_FS_FBFETCH:
       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
+   case PIPE_CAP_TGSI_CLOCK:
+      return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
    case PIPE_CAP_TEXTURE_GATHER_SM5:
    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
    case PIPE_CAP_FAKE_SW_MSAA:
@@ -274,7 +276,6 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_INT64:
    case PIPE_CAP_INT64_DIVMOD:
    case PIPE_CAP_TGSI_TEX_TXF_LZ:
-   case PIPE_CAP_TGSI_CLOCK:
    case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
    case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
    case PIPE_CAP_TGSI_BALLOT: