Mesa (master): freedreno/a6xx: scissor fixes
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Fri Aug 17 15:05:04 UTC 2018
Module: Mesa
Branch: master
Commit: 7c73d411606ce118412f833bfb90e593e0bb1f5e
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c73d411606ce118412f833bfb90e593e0bb1f5e
Author: Rob Clark <robdclark at gmail.com>
Date: Wed Aug 15 14:04:12 2018 -0400
freedreno/a6xx: scissor fixes
Signed-off-by: Rob Clark <robdclark at gmail.com>
---
src/gallium/drivers/freedreno/a6xx/fd6_draw.c | 4 ++--
src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index e4d44683ca..5c5667515c 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -361,8 +361,8 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
OUT_PKT4(ring, REG_A6XX_RB_BLIT_SCISSOR_TL, 2);
OUT_RING(ring, A6XX_RB_BLIT_SCISSOR_TL_X(scissor->minx) |
A6XX_RB_BLIT_SCISSOR_TL_Y(scissor->miny));
- OUT_RING(ring, A6XX_RB_BLIT_SCISSOR_BR_X(scissor->maxx) |
- A6XX_RB_BLIT_SCISSOR_BR_Y(scissor->maxy));
+ OUT_RING(ring, A6XX_RB_BLIT_SCISSOR_BR_X(scissor->maxx - 1) |
+ A6XX_RB_BLIT_SCISSOR_BR_Y(scissor->maxy - 1));
if (buffers & PIPE_CLEAR_COLOR) {
for (int i = 0; i < pfb->nr_cbufs; i++) {
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index dd0f16a2bc..fdffc692b2 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -548,8 +548,8 @@ set_blit_scissor(struct fd_batch *batch)
A6XX_RB_BLIT_SCISSOR_TL_X(blit_scissor.minx) |
A6XX_RB_BLIT_SCISSOR_TL_Y(blit_scissor.miny));
OUT_RING(ring,
- A6XX_RB_BLIT_SCISSOR_BR_X(blit_scissor.maxx) |
- A6XX_RB_BLIT_SCISSOR_BR_Y(blit_scissor.maxy));
+ A6XX_RB_BLIT_SCISSOR_BR_X(blit_scissor.maxx - 1) |
+ A6XX_RB_BLIT_SCISSOR_BR_Y(blit_scissor.maxy - 1));
}
static void
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