Mesa (master): i965/icl: Allow headerless sampler messages for pre-emptable contexts

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Module: Mesa
Branch: master
Commit: 482f328f3b2abd88288b54769193aa75d0f406e0
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=482f328f3b2abd88288b54769193aa75d0f406e0

Author: Anuj Phogat <anuj.phogat at gmail.com>
Date:   Fri Aug 17 16:36:17 2018 -0700

i965/icl: Allow headerless sampler messages for pre-emptable contexts

It fixes simulator warnings in piglit tests complaining about missing
support for headerless sampler messages for pre-emptable contexts.
Bit 5 in SAMPLER MODE register is newly introduced for ICLLP.

Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_defines.h      |  4 ++++
 src/mesa/drivers/dri/i965/brw_state_upload.c | 11 +++++++++++
 2 files changed, 15 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 855f1c7d74..433314115b 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1673,4 +1673,8 @@ enum brw_pixel_shader_coverage_mask_mode {
 # define GLK_SCEC_BARRIER_MODE_3D_HULL     (1 << 7)
 # define GLK_SCEC_BARRIER_MODE_MASK        REG_MASK(1 << 7)
 
+#define GEN11_SAMPLER_MODE                                  0xE18C
+# define HEADERLESS_MESSAGE_FOR_PREEMPTABLE_CONTEXTS        (1 << 5)
+# define HEADERLESS_MESSAGE_FOR_PREEMPTABLE_CONTEXTS_MASK   REG_MASK(1 << 5)
+
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 757426407c..2af4c45bc4 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -63,6 +63,17 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
 
    brw_upload_invariant_state(brw);
 
+   if (devinfo->gen == 11) {
+      /* The default behavior of bit 5 "Headerless Message for Pre-emptable
+       * Contexts" in SAMPLER MODE register is set to 0, which means
+       * headerless sampler messages are not allowed for pre-emptable
+       * contexts. Set the bit 5 to 1 to allow them.
+       */
+      brw_load_register_imm32(brw, GEN11_SAMPLER_MODE,
+                              HEADERLESS_MESSAGE_FOR_PREEMPTABLE_CONTEXTS_MASK |
+                              HEADERLESS_MESSAGE_FOR_PREEMPTABLE_CONTEXTS);
+   }
+
    if (devinfo->gen == 10 || devinfo->gen == 11) {
       /* From gen10 workaround table in h/w specs:
        *