Mesa (staging/18.1): i965: Make blt_pitch public
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Fri Aug 24 16:34:31 UTC 2018
Module: Mesa
Branch: staging/18.1
Commit: b9c903b406df5b46dde6ab13b63887377d29e559
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9c903b406df5b46dde6ab13b63887377d29e559
Author: Nanley Chery <nanley.g.chery at intel.com>
Date: Wed May 30 16:22:13 2018 -0700
i965: Make blt_pitch public
We'd like to reuse this helper.
Cc: <mesa-stable at lists.freedesktop.org>
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
(cherry picked from commit 0ab2541943478ae39112760198a1fbf71fd48986)
---
src/mesa/drivers/dri/i965/intel_blit.c | 12 ++----------
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 10 ++++++++++
2 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index dcecab677e..ec875c8fa2 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -121,15 +121,6 @@ set_blitter_tiling(struct brw_context *brw,
SET_BLITTER_TILING(brw, false, false); \
ADVANCE_BATCH()
-static int
-blt_pitch(struct intel_mipmap_tree *mt)
-{
- int pitch = mt->surf.row_pitch;
- if (mt->surf.tiling != ISL_TILING_LINEAR)
- pitch /= 4;
- return pitch;
-}
-
bool
intel_miptree_blit_compatible_formats(mesa_format src, mesa_format dst)
{
@@ -403,7 +394,8 @@ emit_miptree_blit(struct brw_context *brw,
* for linear surfaces and DWords for tiled surfaces. So the maximum
* pitch is 32k linear and 128k tiled.
*/
- if (blt_pitch(src_mt) >= 32768 || blt_pitch(dst_mt) >= 32768) {
+ if (intel_miptree_blt_pitch(src_mt) >= 32768 ||
+ intel_miptree_blt_pitch(dst_mt) >= 32768) {
perf_debug("Falling back due to >= 32k/128k pitch\n");
return false;
}
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 241832f686..13a9cb9b60 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -741,6 +741,16 @@ intel_miptree_set_depth_clear_value(struct brw_context *brw,
struct intel_mipmap_tree *mt,
float clear_value);
+
+static inline int
+intel_miptree_blt_pitch(struct intel_mipmap_tree *mt)
+{
+ int pitch = mt->surf.row_pitch;
+ if (mt->surf.tiling != ISL_TILING_LINEAR)
+ pitch /= 4;
+ return pitch;
+}
+
#ifdef __cplusplus
}
#endif
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