Mesa (master): 22 new commits

Wed Aug 29 19:04:30 UTC 2018

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8033d4083d341f3351c8ca929935617b9b16f3a
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Aug 17 09:15:56 2018 -0500

    intel/compiler: Remove surface_idx from brw_image_param
    
    Now that the drivers are lowering to surface indices themselves, we no
    longer need to push the surface index into the shader.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3cbc02e4693030d18a24602cf72e693b92e1a7a3
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Aug 16 11:01:24 2018 -0500

    intel: Use TXS for image_size when we have a typed surface
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=09f1de97a76a4990fd7ce909760f3c8933263b05
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Aug 16 16:23:10 2018 -0500

    anv,i965: Lower away image derefs in the driver
    
    Previously, the back-end compiler turn image access into magic uniform
    reads and there was a complex contract between back-end compiler and
    driver about setting up and filling out those params.  As of this
    commit, both drivers now lower image_deref_load_param_intel intrinsics
    to load_uniform intrinsics controlled by the driver and lower the other
    image_deref_* intrinsics to image_* intrinsics which take an actual
    binding table index.  There are still "magic" uniforms but they are now
    added and controlled entirely by the driver and that contract no longer
    spans components.
    
    This also has the side-effect of making most image use compile-time
    binding table indices.  Previously, all image access pulled the binding
    table index from a uniform.  Part of the reason for this was that the
    magic uniforms made it difficult to decouple binding table indices from
    the uniforms and, since they are indexed completely differently
    (especially in Vulkan), it was hard to pull them apart.  Now that the
    driver is handling both, it's trivial to decouple the two and provide
    actual binding table indices.
    
    Shader-db results on Kaby Lake:
    
        total instructions in shared programs: 15166872 -> 15164293 (-0.02%)
        instructions in affected programs: 115834 -> 113255 (-2.23%)
        helped: 191
        HURT: 0
    
        total cycles in shared programs: 571311495 -> 571196465 (-0.02%)
        cycles in affected programs: 4757115 -> 4642085 (-2.42%)
        helped: 73
        HURT: 67
    
        total spills in shared programs: 10951 -> 10926 (-0.23%)
        spills in affected programs: 742 -> 717 (-3.37%)
        helped: 7
        HURT: 0
    
        total fills in shared programs: 22226 -> 22201 (-0.11%)
        fills in affected programs: 1146 -> 1121 (-2.18%)
        helped: 7
        HURT: 0
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0de003be0363df74a18f463d0291bc8000d4c1dd
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Aug 16 15:11:44 2018 -0500

    nir: Add handle/index-based image intrinsics
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3942943819a87ad423df56e3138223fc37f5db21
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Aug 16 15:11:12 2018 -0500

    nir: Use a bitfield for image access qualifiers
    
    This commit expands the current memory access enum to contain the extra
    two bits provided for images.  We choose to follow the SPIR-V convention
    of NonReadable and NonWriteable because readonly implies that you *can*
    read so readonly + writeonly doesn't make as much sense as NonReadable +
    NonWriteable.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=48e4fa7dd8c4b777989c4a731d6ac54cfe6c24eb
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Aug 16 14:31:28 2018 -0500

    glsl/link,i965: Make ImageAccess four-state
    
    The GLSL spec allows you to set both the "readonly" and "writeonly"
    qualifiers on images to indicate that it can only be used with
    imageSize.  However, we had no way of representing this int he linked
    shader and flagged it as GL_READ_ONLY.  This is good from a "does it use
    this buffer?" perspective but not from a format and access lowering
    perspective.  By using GL_NONE for if "readonly" and "writeonly" are
    both set, we can detect this case in the driver and handle it correctly.
    
    Nothing currently relies on the type of surface in the "readonly" +
    "writeonly" case but that's about to change.  i965 is the only drier
    which uses the ImageAccess field and gl_bindless_image::access is
    currently unused.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=42891438990ce170a2ce08f71a1360842d5897a1
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Aug 16 10:16:41 2018 -0500

    intel/compiler: Use two components for 1D array image sizes
    
    Having the array length component stored in .z was a small convenience
    for the ISL image param filling code and an annoyance in the NIR
    lowering code.  The only convenience of treating 1D arrays like 2D
    arrays in the lowering code is in the address calculation code so let's
    put all the complexity there as well.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b1c414ef2834cfe5f764f5af0ff2ad09d4584351
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Aug 16 10:12:16 2018 -0500

    isl: Use the view array length for the image size
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=37f7983bcca1afd4d570bc654b927a92308d1c68
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Sat Jan 27 13:19:57 2018 -0800

    intel/compiler: Do image load/store lowering to NIR
    
    This commit moves our storage image format conversion codegen into NIR
    instead of doing it in the back-end.  This has the advantage of letting
    us run it through NIR's optimizer which is pretty effective at shrinking
    things down.  In the common case of rgba8, the number of instructions
    emitted after NIR is done with it is half of what it was with the
    lowering happening in the back-end.  On the downside, the back-end's
    lowering is able to directly use predicates and the NIR lowering has to
    use IFs.
    
    Shader-db results on Kaby Lake:
    
        total instructions in shared programs: 15166910 -> 15166872 (<.01%)
        instructions in affected programs: 5895 -> 5857 (-0.64%)
        helped: 15
        HURT: 0
    
    Clearly, we don't have that much image_load_store happening in the
    shaders in shader-db....
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b217705dec60ef8335e4ff304605f26e9038b632
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Aug 16 10:22:32 2018 -0500

    nir/types: Add a wrapper for coordinate_components
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2d0a2b1100537348d25e445871a66fa90d16131
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Wed Aug 15 14:04:25 2018 -0500

    anv/pipeline: Remove dead image loads in lower_input_attacnments
    
    Dead code will get rid of them eventually but it's better if they're
    just gone so we guarantee they won't trip up later passes.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=15d39f474b89093507a80813d149c40461b8f355
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Tue Aug 14 14:03:05 2018 -0500

    nir: Make image load/store intrinsics variable-width
    
    Instead of requiring 4 components, this allows them to potentially use
    fewer.  Both the SPIR-V and GLSL paths still generate vec4 intrinsics so
    drivers which assume 4 components should be safe.  However, we want to
    be able to shrink them for i965.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cdf8f9339017ea5ee3c7f3a585c6bd5a815b99b
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Aug 16 09:21:10 2018 -0500

    nir/format_convert: Fix a bitmask in unpack_11f11f10f
    
    Fixes: 4e337b42f9a2 "nir/format_convert: Add pack/unpack for R11F_G11F_B10F"
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1f7be4968f5fb4c4c97cafec591dd1721fecd69e
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Mon Aug 13 17:31:19 2018 -0500

    nir/format_convert: Rename pack_r11g11b10f to pack_11f11f10f
    
    This matches the unpack function.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7bd0363d6fdc7594273e6ef8a6dbd5bd9eb89856
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Mon Aug 13 16:13:50 2018 -0500

    nir/format_convert: Add [us]norm conversion helpers
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=152fdeddbb7fa43649b864cfd1b98f40e9a355bb
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Mon Aug 13 14:57:22 2018 -0500

    nir/format_convert: Rename nir_format_bitcast_uint_vec
    
    We have a name for that, it's called a uvec.  This just makes the
    function name a bit shorter.  While we're here, we also add an assert
    for one of the assumptions this function makes.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c5df52bdc5e673ed818c1a90ba7a28031f6b159
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Mon Aug 13 12:04:25 2018 -0500

    nir/format_convert: Add vec mask and sign-extend helpers
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea4f2008647d5fd32ac11a8ff81c7b7cb7496d38
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Mon Aug 13 11:41:41 2018 -0500

    nir/format_convert: Add support for unpacking signed integers
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=80c424148b47b6615f8e8c4886257a5c7323ef25
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Wed Aug 15 11:58:50 2018 -0500

    nir/opcodes: Make unpack_half_2x16_split_* variable-width
    
    There is nothing inherent about these opcodes that requires them to only
    take scalars.  It's very convenient if we let them take vectors as well.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d448fa3ae35c3aa4e7bf25f8b1870315573e32fa
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Wed Aug 15 04:29:42 2018 -0500

    nir/algebraic: Add some max/min optimizations
    
    Found by inspection.  This doesn't help much now but we'll see this
    pattern with images if you load UNORM and then store UNORM.
    
    Shader-db results on Kaby Lake:
    
        total instructions in shared programs: 15166916 -> 15166910 (<.01%)
        instructions in affected programs: 761 -> 755 (-0.79%)
        helped: 6
        HURT: 0
    
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4dd5263663585b55119e49c8dfade015c86aff1a
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Tue Aug 14 14:37:39 2018 -0500

    nir/algebraic: Add more extract_[iu](8|16) optimizations
    
    This adds the "(a << N) >> M" family of mask or sign-extensions.  Not a
    huge win right now but this pattern will soon be generated by NIR format
    lowering code.
    
    Shader-db results on Kaby Lake:
    
        total instructions in shared programs: 15166918 -> 15166916 (<.01%)
        instructions in affected programs: 36 -> 34 (-5.56%)
        helped: 2
        HURT: 0
    
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=116b47fe3c0395e95b67c6bd3506ab7d6a83393e
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Tue Aug 14 15:10:22 2018 -0500

    nir/algebraic: Be more careful converting ushr to extract_u8/16
    
    If it's not the right bit-size, it may not actually be the correct
    extraction.  For now, we'll only worry about 32-bit versions.
    
    Fixes: 905ff8619824 "nir: Recognize open-coded extract_u16"
    Fixes: 76289fbfa84a "nir: Recognize open-coded extract_u8"
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>