Mesa (master): nir: Move intel's half-float image store lowering to to nir_format.h.

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Thu Dec 13 20:27:12 UTC 2018


Module: Mesa
Branch: master
Commit: 4407e688cdf65b1a25f09bcfdb577d5c175aeb9a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4407e688cdf65b1a25f09bcfdb577d5c175aeb9a

Author: Eric Anholt <eric at anholt.net>
Date:   Tue Dec 11 13:49:28 2018 -0800

nir: Move intel's half-float image store lowering to to nir_format.h.

I needed the same function for v3d.  This was originally in d3e046e76c06
("nir: Pull some of intel's image load/store format conversion to
nir_format.h") before we made am istake about simplifying the function.

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

---

 src/compiler/nir/nir_format_convert.h               | 13 +++++++++++++
 src/intel/compiler/brw_nir_lower_image_load_store.c | 10 ++--------
 2 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/src/compiler/nir/nir_format_convert.h b/src/compiler/nir/nir_format_convert.h
index 7ebb7d50ca..9c8d0d21e0 100644
--- a/src/compiler/nir/nir_format_convert.h
+++ b/src/compiler/nir/nir_format_convert.h
@@ -256,6 +256,19 @@ nir_format_float_to_snorm(nir_builder *b, nir_ssa_def *f, const unsigned *bits)
    return nir_f2i32(b, nir_fround_even(b, nir_fmul(b, f, factor)));
 }
 
+/* Converts a vector of floats to a vector of half-floats packed in the low 16
+ * bits.
+ */
+static inline nir_ssa_def *
+nir_format_float_to_half(nir_builder *b, nir_ssa_def *f)
+{
+   nir_ssa_def *zero = nir_imm_float(b, 0);
+   nir_ssa_def *f16comps[4];
+   for (unsigned i = 0; i < f->num_components; i++)
+      f16comps[i] = nir_pack_half_2x16_split(b, nir_channel(b, f, i), zero);
+   return nir_vec(b, f16comps, f->num_components);
+}
+
 static inline nir_ssa_def *
 nir_format_linear_to_srgb(nir_builder *b, nir_ssa_def *c)
 {
diff --git a/src/intel/compiler/brw_nir_lower_image_load_store.c b/src/intel/compiler/brw_nir_lower_image_load_store.c
index 269dbf8e28..2abebceb2d 100644
--- a/src/intel/compiler/brw_nir_lower_image_load_store.c
+++ b/src/intel/compiler/brw_nir_lower_image_load_store.c
@@ -544,14 +544,8 @@ convert_color_for_store(nir_builder *b, const struct gen_device_info *devinfo,
       break;
 
    case ISL_SFLOAT:
-      if (image.bits[0] == 16) {
-         nir_ssa_def *f16comps[4];
-         for (unsigned i = 0; i < image.chans; i++) {
-            f16comps[i] = nir_pack_half_2x16_split(b, nir_channel(b, color, i),
-                                                      nir_imm_float(b, 0));
-         }
-         color = nir_vec(b, f16comps, image.chans);
-      }
+      if (image.bits[0] == 16)
+         color = nir_format_float_to_half(b, color);
       break;
 
    case ISL_UINT:




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