Mesa (master): r600/sb: handle scratch mem reads on r600
Dave Airlie
airlied at kemper.freedesktop.org
Thu Feb 8 23:53:35 UTC 2018
Module: Mesa
Branch: master
Commit: 22fc5eff803d14e99e9f86db223ceedcef1b9108
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=22fc5eff803d14e99e9f86db223ceedcef1b9108
Author: Dave Airlie <airlied at redhat.com>
Date: Tue Feb 6 14:17:46 2018 +1000
r600/sb: handle scratch mem reads on r600
On r600 we use the scratch mem with read/read_ind, in that case
sb should track the rw_gpr as a dst instead of a src.
This stops the whole shader being optimised out.
Signed-off-by: Dave Airlie <airlied at redhat.com>
Reviewed-by: Dave Airlie <airlied at redhat.com>
---
src/gallium/drivers/r600/sb/sb_bc_finalize.cpp | 9 ++++++++-
src/gallium/drivers/r600/sb/sb_bc_parser.cpp | 19 +++++++++++++++----
2 files changed, 23 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
index e737f3d6cd..5c572938a1 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_finalize.cpp
@@ -778,8 +778,15 @@ void bc_finalizer::finalize_cf(cf_node* c) {
int reg = -1;
unsigned mask = 0;
+
for (unsigned chan = 0; chan < 4; ++chan) {
- value *v = c->src[chan];
+ value *v;
+ if (ctx.hw_class == HW_CLASS_R600 && c->bc.op == CF_OP_MEM_SCRATCH &&
+ (c->bc.type == 2 || c->bc.type == 3))
+ v = c->dst[chan];
+ else
+ v = c->src[chan];
+
if (!v || v->is_undef())
continue;
diff --git a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
index 2ec842159b..a7b828268b 100644
--- a/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
+++ b/src/gallium/drivers/r600/sb/sb_bc_parser.cpp
@@ -832,12 +832,23 @@ int bc_parser::prepare_ir() {
do {
- c->src.resize(4);
+ if (ctx.hw_class == HW_CLASS_R600 && c->bc.op == CF_OP_MEM_SCRATCH &&
+ (c->bc.type == 2 || c->bc.type == 3)) {
+ c->dst.resize(4);
+ for(int s = 0; s < 4; ++s) {
+ if (c->bc.comp_mask & (1 << s))
+ c->dst[s] =
+ sh->get_gpr_value(true, c->bc.rw_gpr, s, false);
+ }
+ } else {
+ c->src.resize(4);
- for(int s = 0; s < 4; ++s) {
- if (c->bc.comp_mask & (1 << s))
- c->src[s] =
+
+ for(int s = 0; s < 4; ++s) {
+ if (c->bc.comp_mask & (1 << s))
+ c->src[s] =
sh->get_gpr_value(true, c->bc.rw_gpr, s, false);
+ }
}
if (((flags & CF_RAT) || (!(flags & CF_STRM))) && (c->bc.type & 1)) { // indexed write
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