Mesa (master): i965/icl: Update the assert in brw_memory_barrier()

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: 27d0034938a8cee86a5a85cc22f610b1afdc9530
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=27d0034938a8cee86a5a85cc22f610b1afdc9530

Author: Anuj Phogat <anuj.phogat at gmail.com>
Date:   Thu Jul 20 16:21:03 2017 -0700

i965/icl: Update the assert in brw_memory_barrier()

Nothing is changed here from gen10 to gen11. So, just update
the assert.

Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_program.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index 9aaffc37bd..a513499516 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -280,7 +280,7 @@ brw_memory_barrier(struct gl_context *ctx, GLbitfield barriers)
    unsigned bits = (PIPE_CONTROL_DATA_CACHE_FLUSH |
                     PIPE_CONTROL_NO_WRITE |
                     PIPE_CONTROL_CS_STALL);
-   assert(devinfo->gen >= 7 && devinfo->gen <= 10);
+   assert(devinfo->gen >= 7 && devinfo->gen <= 11);
 
    if (barriers & (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT |
                    GL_ELEMENT_ARRAY_BARRIER_BIT |