Mesa (master): amd/common: use ac_image_load when lod is zero

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 50cfad0298bbb4e341664ed0ec8b4d9b429988dc
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=50cfad0298bbb4e341664ed0ec8b4d9b429988dc

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Thu Jan  4 16:24:22 2018 +0100

amd/common: use ac_image_load when lod is zero

This might decrease VGPR spilling, because we no longer
have to use v4i32 for 2D fetches when level == 0. We now
use v2i32 for those cases.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>

---

 src/amd/common/ac_nir_to_llvm.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index e9f997c7a4..90faf0537f 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2252,7 +2252,9 @@ static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
 	case nir_texop_txf:
 	case nir_texop_txf_ms:
 	case nir_texop_samples_identical:
-		args->opcode = instr->sampler_dim == GLSL_SAMPLER_DIM_MS ? ac_image_load : ac_image_load_mip;
+		args->opcode = lod_is_zero ||
+			       instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
+					ac_image_load : ac_image_load_mip;
 		args->compare = false;
 		args->offset = false;
 		break;