Mesa (master): broadcom/vc5: Update QPU instruction pack/unpack for v4.2.
Eric Anholt
anholt at kemper.freedesktop.org
Sat Jan 27 08:41:12 UTC 2018
Module: Mesa
Branch: master
Commit: f2e41daac577f0b34b345e8e4c801f44454faa02
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2e41daac577f0b34b345e8e4c801f44454faa02
Author: Eric Anholt <eric at anholt.net>
Date: Sat Jan 27 18:29:37 2018 +1100
broadcom/vc5: Update QPU instruction pack/unpack for v4.2.
After the 4.1 spec, 4.2 retroactively renamed patchid to barrierid because
it's used for other barriers in compute.
---
src/broadcom/qpu/qpu_instr.c | 5 +++--
src/broadcom/qpu/qpu_instr.h | 4 ++--
src/broadcom/qpu/qpu_pack.c | 2 +-
src/broadcom/qpu/tests/qpu_disasm.c | 3 +++
4 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/src/broadcom/qpu/qpu_instr.c b/src/broadcom/qpu/qpu_instr.c
index 986097a11b..f31c81f8ca 100644
--- a/src/broadcom/qpu/qpu_instr.c
+++ b/src/broadcom/qpu/qpu_instr.c
@@ -48,6 +48,7 @@ v3d_qpu_magic_waddr_name(enum v3d_qpu_waddr waddr)
[V3D_QPU_WADDR_VPMU] = "vpmu",
[V3D_QPU_WADDR_SYNC] = "sync",
[V3D_QPU_WADDR_SYNCU] = "syncu",
+ [V3D_QPU_WADDR_SYNCB] = "syncb",
[V3D_QPU_WADDR_RECIP] = "recip",
[V3D_QPU_WADDR_RSQRT] = "rsqrt",
[V3D_QPU_WADDR_EXP] = "exp",
@@ -125,7 +126,7 @@ v3d_qpu_add_op_name(enum v3d_qpu_add_op op)
[V3D_QPU_A_VDWWT] = "vdwwt",
[V3D_QPU_A_IID] = "iid",
[V3D_QPU_A_SAMPID] = "sampid",
- [V3D_QPU_A_PATCHID] = "patchid",
+ [V3D_QPU_A_BARRIERID] = "barrierid",
[V3D_QPU_A_TMUWT] = "tmuwt",
[V3D_QPU_A_VPMSETUP] = "vpmsetup",
[V3D_QPU_A_VPMWT] = "vpmwt",
@@ -389,7 +390,7 @@ static const uint8_t add_op_args[] = {
[V3D_QPU_A_VDWWT] = D,
[V3D_QPU_A_IID] = D,
[V3D_QPU_A_SAMPID] = D,
- [V3D_QPU_A_PATCHID] = D,
+ [V3D_QPU_A_BARRIERID] = D,
[V3D_QPU_A_TMUWT] = D,
[V3D_QPU_A_VPMWT] = D,
diff --git a/src/broadcom/qpu/qpu_instr.h b/src/broadcom/qpu/qpu_instr.h
index b65a35ae3c..2289e18225 100644
--- a/src/broadcom/qpu/qpu_instr.h
+++ b/src/broadcom/qpu/qpu_instr.h
@@ -107,7 +107,7 @@ enum v3d_qpu_waddr {
V3D_QPU_WADDR_VPMU = 15,
V3D_QPU_WADDR_SYNC = 16,
V3D_QPU_WADDR_SYNCU = 17,
- /* reserved */
+ V3D_QPU_WADDR_SYNCB = 18,
V3D_QPU_WADDR_RECIP = 19,
V3D_QPU_WADDR_RSQRT = 20,
V3D_QPU_WADDR_EXP = 21,
@@ -185,7 +185,7 @@ enum v3d_qpu_add_op {
V3D_QPU_A_VDWWT,
V3D_QPU_A_IID,
V3D_QPU_A_SAMPID,
- V3D_QPU_A_PATCHID,
+ V3D_QPU_A_BARRIERID,
V3D_QPU_A_TMUWT,
V3D_QPU_A_VPMSETUP,
V3D_QPU_A_VPMWT,
diff --git a/src/broadcom/qpu/qpu_pack.c b/src/broadcom/qpu/qpu_pack.c
index 60ed2d697c..4615fd35d0 100644
--- a/src/broadcom/qpu/qpu_pack.c
+++ b/src/broadcom/qpu/qpu_pack.c
@@ -514,7 +514,7 @@ static const struct opcode_desc add_ops[] = {
{ 187, 187, 1 << 2, 1 << 2, V3D_QPU_A_VDWWT, 33 },
{ 187, 187, 1 << 2, 1 << 2, V3D_QPU_A_IID, 40 },
{ 187, 187, 1 << 2, 1 << 3, V3D_QPU_A_SAMPID, 40 },
- { 187, 187, 1 << 2, 1 << 4, V3D_QPU_A_PATCHID, 40 },
+ { 187, 187, 1 << 2, 1 << 4, V3D_QPU_A_BARRIERID, 40 },
{ 187, 187, 1 << 2, 1 << 5, V3D_QPU_A_TMUWT },
{ 187, 187, 1 << 2, 1 << 6, V3D_QPU_A_VPMWT },
diff --git a/src/broadcom/qpu/tests/qpu_disasm.c b/src/broadcom/qpu/tests/qpu_disasm.c
index a8e803ad81..814e032bf1 100644
--- a/src/broadcom/qpu/tests/qpu_disasm.c
+++ b/src/broadcom/qpu/tests/qpu_disasm.c
@@ -82,6 +82,9 @@ static const struct {
{ 41, 0x3de020c7bdfd200dull, "ldvpmg_in rf7, r2, r2; mov r3, 13" },
{ 41, 0x3de02040f8ff7201ull, "stvpmv 1, rf8 ; mov r1, 1" },
{ 41, 0xd8000e50bb2d3000ull, "sampid rf16 ; fmul rf57.h, r3, r1.l" },
+
+ /* v4.2 changes */
+ { 42, 0x3c203192bb814000ull, "barrierid syncb ; nop ; thrsw" },
};
static void
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