Mesa (refs/keep-around/ef79457004e141606614f6d582f7e51bd4cadc82): radv: Merge the flush bits of CMASK & DCC clear.

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Module: Mesa
Branch: refs/keep-around/ef79457004e141606614f6d582f7e51bd4cadc82
Commit: ef79457004e141606614f6d582f7e51bd4cadc82
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ef79457004e141606614f6d582f7e51bd4cadc82

Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Tue Jun 19 10:05:20 2018 +0200

radv: Merge the flush bits of CMASK & DCC clear.

Probably won't be much different in practice, but still wrong.

Fixes Coverity issue 1435002.

Not CC'ing to stable since this is only hit if you enable MSAA
DCC via RADV_DEBUG.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>

---

 src/amd/vulkan/radv_meta_clear.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 21c950c782..14af256082 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -1089,7 +1089,7 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
 		if (!can_avoid_fast_clear_elim)
 			need_decompress_pass = true;
 
-		flush_bits = radv_clear_dcc(cmd_buffer, iview->image, reset_value);
+		flush_bits |= radv_clear_dcc(cmd_buffer, iview->image, reset_value);
 
 		radv_set_dcc_need_cmask_elim_pred(cmd_buffer, iview->image,
 						  need_decompress_pass);