Mesa (staging/18.1): i965/miptree: Drop an if case from retile_as_linear

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Module: Mesa
Branch: staging/18.1
Commit: bb242dbaa979fbf843f496a9a61fc6d113508cc6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb242dbaa979fbf843f496a9a61fc6d113508cc6

Author: Nanley Chery <nanley.g.chery at intel.com>
Date:   Wed May 23 15:50:14 2018 -0700

i965/miptree: Drop an if case from retile_as_linear

Drop an if statement whose predicate never evaluates to true. row_pitch
belongs to a surface with non-linear tiling. According to
isl_calc_tiled_min_row_pitch, the pitch is a multiple of the tile width.
By looking at isl_tiling_get_info, we see that non-linear tilings have
widths greater than or equal to 128B.

Cc: <mesa-stable at lists.freedesktop.org>
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
(cherry picked from commit 3df201e3e843b0c4fe810360f7e8b81de9c6a92a)

---

 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index af67191b98..53e01120a9 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -518,10 +518,6 @@ need_to_retile_as_linear(struct brw_context *brw, unsigned row_pitch,
    if (tiling == ISL_TILING_LINEAR)
       return false;
 
-    /* If the width is much smaller than a tile, don't bother tiling. */
-   if (row_pitch < 64)
-      return true;
-
    if (ALIGN(row_pitch, 512) >= 32768) {
       perf_debug("row pitch %u too large to blit, falling back to untiled",
                  row_pitch);