Mesa (master): winsys/amdgpu: pad compute IBs

[Marek Olšák]

Module: Mesa
Branch: master
Commit: a4a113b5bc8e3248ebcfeac6f9c9ff24e85caadd
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a4a113b5bc8e3248ebcfeac6f9c9ff24e85caadd

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue Mar  6 15:03:09 2018 -0500

winsys/amdgpu: pad compute IBs

v2: pad with PKT2 NOPs on SI

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

---

 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index d9a95c0509..a3feeb9302 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -1528,6 +1528,7 @@ static int amdgpu_cs_flush(struct radeon_winsys_cs *rcs,
       }
       break;
    case RING_GFX:
+   case RING_COMPUTE:
       /* pad GFX ring to 8 DWs to meet CP fetch alignment requirements */
       if (ws->info.gfx_ib_pad_with_type2) {
          while (rcs->current.cdw & 7)
@@ -1536,7 +1537,8 @@ static int amdgpu_cs_flush(struct radeon_winsys_cs *rcs,
          while (rcs->current.cdw & 7)
             radeon_emit(rcs, 0xffff1000); /* type3 nop packet */
       }
-      ws->gfx_ib_size_counter += (rcs->prev_dw + rcs->current.cdw) * 4;
+      if (cs->ring_type == RING_GFX)
+         ws->gfx_ib_size_counter += (rcs->prev_dw + rcs->current.cdw) * 4;
       break;
    case RING_UVD:
    case RING_UVD_ENC: