Mesa (18.1): intel/compiler: fix brw_imm_w for negative 16-bit integers

[Dylan Baker]

Module: Mesa
Branch: 18.1
Commit: 0d15a443fae48210ba16e7a3b664619ca5f89519
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d15a443fae48210ba16e7a3b664619ca5f89519

Author: Jose Maria Casanova Crespo <jmcasanova at igalia.com>
Date:   Thu May  3 01:38:47 2018 +0200

intel/compiler: fix brw_imm_w for negative 16-bit integers

16-bit immediates need to replicate the 16-bit immediate value
in both words of the 32-bit value. This needs to be careful
to avoid sign-extension, which the previous implementation was
not handling properly.

For example, with the previous implementation, storing the value
-3 would generate imm.d = 0xfffffffd due to signed integer sign
extension, which is not correct. Instead, we should cast to
uint16_t, which gives us the correct result: imm.ud = 0xfffdfffd.

We only had a couple of cases hitting this path in the driver
until now, one with value -1, which would work since all bits are
one in this case, and another with value -2 in brw_clip_tri(),
which would hit the aforementioned issue (this case only affects
gen4 although we are not aware of whether this was causing an
actual bug somewhere).

v2: Make explicit uint32_t casting for left shift (Jason Ekstrand)

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

Cc: "18.0 18.1" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit f0e6dacee529661393964725bed561c45405bae4)

---

 src/intel/compiler/brw_reg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h
index dff9b970b2..ac12ab3d2d 100644
--- a/src/intel/compiler/brw_reg.h
+++ b/src/intel/compiler/brw_reg.h
@@ -705,7 +705,7 @@ static inline struct brw_reg
 brw_imm_w(int16_t w)
 {
    struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_W);
-   imm.d = w | (w << 16);
+   imm.ud = (uint16_t)w | (uint32_t)(uint16_t)w << 16;
    return imm;
 }