Mesa (master): radv: set amdgpu-32bit-address-high-bits LLVM attribute

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: d8a61d32322b2a12bb431d217c5798d8234d6c13
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8a61d32322b2a12bb431d217c5798d8234d6c13

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Wed May 16 16:02:04 2018 +0200

radv: set amdgpu-32bit-address-high-bits LLVM attribute

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

---

 src/amd/vulkan/radv_nir_to_llvm.c | 6 ++++++
 src/amd/vulkan/radv_shader.c      | 1 +
 src/amd/vulkan/radv_shader.h      | 1 +
 3 files changed, 8 insertions(+)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 2d91ded7fe..3f32f62cdc 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -511,6 +511,12 @@ create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module,
 		}
 	}
 
+	if (options->address32_hi) {
+		ac_llvm_add_target_dep_function_attr(main_function,
+						     "amdgpu-32bit-address-high-bits",
+						     options->address32_hi);
+	}
+
 	if (max_workgroup_size) {
 		ac_llvm_add_target_dep_function_attr(main_function,
 						     "amdgpu-max-work-group-size",
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 7589d9c88a..6ccbe81eff 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -482,6 +482,7 @@ shader_variant_create(struct radv_device *device,
 				 device->instance->debug_flags & RADV_DEBUG_PREOPTIR;
 	options->record_llvm_ir = device->keep_shader_info;
 	options->tess_offchip_block_dw_size = device->tess_offchip_block_dw_size;
+	options->address32_hi = device->physical_device->rad_info.address32_hi;
 
 	if (options->supports_spill)
 		tm_options |= AC_TM_SUPPORTS_SPILL;
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 679fa44279..05de188e3f 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -123,6 +123,7 @@ struct radv_nir_compiler_options {
 	enum radeon_family family;
 	enum chip_class chip_class;
 	uint32_t tess_offchip_block_dw_size;
+	uint32_t address32_hi;
 };
 
 enum radv_ud_index {