Mesa (master): radv: rewrite the condition that checks allowed depth/stencil values

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Module: Mesa
Branch: master
Commit: 7dcddbe54d6302d70cac573ba62000e7bd0e48e4
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7dcddbe54d6302d70cac573ba62000e7bd0e48e4

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Mon Nov 12 17:57:11 2018 +0100

radv: rewrite the condition that checks allowed depth/stencil values

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

---

 src/amd/vulkan/radv_meta_clear.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 4d8a6a9160..9f74936e98 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -826,8 +826,10 @@ emit_fast_htile_clear(struct radv_cmd_buffer *cmd_buffer,
 	     !(aspects & VK_IMAGE_ASPECT_STENCIL_BIT)))
 		return false;
 
-	if (!radv_is_fast_clear_depth_allowed(clear_value) ||
-	    !(aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
+	if (((aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
+	    !radv_is_fast_clear_depth_allowed(clear_value)) ||
+	    ((aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
+	     !radv_is_fast_clear_stencil_allowed(clear_value)))
 		return false;
 
 	/* GFX8 only supports 32-bit depth surfaces but we can enable TC-compat
@@ -838,12 +840,6 @@ emit_fast_htile_clear(struct radv_cmd_buffer *cmd_buffer,
 	    iview->image->vk_format == VK_FORMAT_D16_UNORM)
 		return false;
 
-	if (vk_format_aspects(iview->image->vk_format) & VK_IMAGE_ASPECT_STENCIL_BIT) {
-		if (!radv_is_fast_clear_stencil_allowed(clear_value) ||
-		    !(aspects & VK_IMAGE_ASPECT_STENCIL_BIT))
-			return false;
-	}
-
 	clear_word = radv_get_htile_fast_clear_value(iview->image, clear_value);
 
 	if (pre_flush) {