Mesa (master): intel/compiler: fix register allocation in opt_peephole_sel

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Wed Nov 28 07:29:19 UTC 2018


Module: Mesa
Branch: master
Commit: e55cbf26ea5ff56a80a55b38e3964ee13a5cfeff
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e55cbf26ea5ff56a80a55b38e3964ee13a5cfeff

Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Tue Nov 27 08:57:13 2018 +0100

intel/compiler: fix register allocation in opt_peephole_sel

This wasn't handling 64-bit cases properly. Found by inspection.

Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>

---

 src/intel/compiler/brw_fs_sel_peephole.cpp | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/intel/compiler/brw_fs_sel_peephole.cpp b/src/intel/compiler/brw_fs_sel_peephole.cpp
index fd02792beb..6395b409b7 100644
--- a/src/intel/compiler/brw_fs_sel_peephole.cpp
+++ b/src/intel/compiler/brw_fs_sel_peephole.cpp
@@ -198,8 +198,7 @@ fs_visitor::opt_peephole_sel()
              */
             fs_reg src0(then_mov[i]->src[0]);
             if (src0.file == IMM) {
-               src0 = vgrf(glsl_type::float_type);
-               src0.type = then_mov[i]->src[0].type;
+               src0 = ibld.vgrf(then_mov[i]->src[0].type);
                ibld.MOV(src0, then_mov[i]->src[0]);
             }
 




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