Mesa (master): nir/from_ssa: Don't rewrite derefs destinations to registers

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Module: Mesa
Branch: master
Commit: 00f385e6d457d9b57f683ea52157e1620b96fa8c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=00f385e6d457d9b57f683ea52157e1620b96fa8c

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Sat Sep 22 06:59:22 2018 -0500

nir/from_ssa: Don't rewrite derefs destinations to registers

We already call nir_rematerialize_derefs_in_use_blocks_impl prior to
calling nir_lower_ssa_defs_to_regs_block so the assertion that all deref
uses in the block should hold.  This fixes the following CTS test when
SPIR-V optimization recipe 1:

dEQP-VK.glsl.struct.local.loop_nested_struct_array_vertex

Fixes: 606eb56ab9449b "intel/nir: Only lower load/store derefs"
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>

---

 src/compiler/nir/nir_from_ssa.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/compiler/nir/nir_from_ssa.c b/src/compiler/nir/nir_from_ssa.c
index 19d4bc3382..08d480f119 100644
--- a/src/compiler/nir/nir_from_ssa.c
+++ b/src/compiler/nir/nir_from_ssa.c
@@ -976,6 +976,12 @@ nir_lower_ssa_defs_to_regs_block(nir_block *block)
          mov->dest.dest = nir_dest_for_reg(reg);
          mov->dest.write_mask = (1 << reg->num_components) - 1;
          nir_instr_insert(nir_after_instr(&load->instr), &mov->instr);
+      } else if (instr->type == nir_instr_type_deref) {
+         /* Derefs should always be SSA values, don't rewrite them. */
+         nir_deref_instr *deref = nir_instr_as_deref(instr);
+         nir_foreach_use_safe(use, &deref->dest.ssa)
+            assert(use->parent_instr->block == block);
+         assert(list_empty(&deref->dest.ssa.if_uses));
       } else {
          nir_foreach_dest(instr, dest_replace_ssa_with_reg, &state);
       }