Mesa (staging/18.2): 24 new commits
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Wed Oct 10 15:31:37 UTC 2018
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8009ea363705ba0b88a0b4ba788a3de0d1d4354
Author: Eric Engestrom <eric.engestrom at intel.com>
Date: Mon Oct 8 16:23:25 2018 +0100
radv: add missing meson c++ visibility arguments
Fixes: 6f3aee40f90d725653b6 "radv: using tls to store llvm related info
and speed up compiles (v10)"
Cc: Dave Airlie <airlied at redhat.com>
Signed-off-by: Eric Engestrom <eric.engestrom at intel.com>
Reviewed-by: Dylan Baker <dylan at pnwbakers.com>
(cherry picked from commit 976188737d69cbfd688fecab05d3b2c38d8cc876)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4136c4e066acf6e629a8fa5525f462f985b0b006
Author: Gert Wollny <gert.wollny at collabora.com>
Date: Thu Oct 4 16:40:07 2018 +0200
virgl, vtest: Correct the transfer size calculation
The transfer size used in virglrenderer refers to uint32_t, so one
must add 3 and then divide by 4 instead of adding 3/4 which is a no-op
with integers.
Fixes: b3b82fe8ea virgl/vtest: add vtest driver
Signed-off-by: Gert Wollny <gert.wollny at collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh at chromium.org>
(cherry picked from commit 5d7858f1517eb0961811e4106ba11c011d7002e3)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2006c70812bf9442cfb010dfa48205c193eef7ab
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Oct 3 12:14:20 2018 -0500
nir/alu_to_scalar: Use ssa_for_alu_src in hand-rolled expansions
The ssa_for_alu_src helper will correctly handle swizzles and other
source modifiers for you. The expansions for unpack_half_2x16,
pack_uvec2_to_uint, and pack_uvec4_to_uint were all broken with regards
to swizzles. The brokenness of unpack_half_2x16 was causing rendering
errors in Rise of the Tomb Raider on Intel ever since c11833ab24dcba26
which added an extra copy propagation to the optimization pipeline and
caused us to start seeing swizzles where we hadn't seen any before.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107926
Fixes: 9ce901058f3d "nir: Add lowering of nir_op_unpack_half_2x16."
Fixes: 9b8786eba955 "nir: Add lowering support for packing opcodes."
Tested-by: Alex Smith <asmith at feralinteractive.com>
Tested-by: Józef Kucia <joseph.kucia at gmail.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit dd553bc67f8ab1513fd196b6ffb7c4a76723adfd)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=43079480da9c491af15cdb282e06278e15fd24ae
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Oct 2 17:19:32 2018 -0500
anv/batch_chain: Don't start a new BO just for BATCH_BUFFER_START
Previously, we just went ahead and emitted MI_BATCH_BUFFER_START as
normal. If we are near enough to the end, this can cause us to start a
new BO just for the MI_BATCH_BUFFER_START which messes up chaining. We
always reserve enough space at the end for an MI_BATCH_BUFFER_START so
we can just increment cmd_buffer->batch.end prior to emitting the
command.
Fixes: a0b133286a3 "anv/batch_chain: Simplify secondary batch return..."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107926
Tested-by: Alex Smith <asmith at feralinteractive.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
(cherry picked from commit f5bab06428fc7ca6116cf0daf1c237eb86202e7a)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d105d247efe2d6e50c535da7fee7ce546be458c
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Mon Sep 24 16:01:38 2018 +0100
Revert "mesa: remove unnecessary 'sort by year' for the GL extensions"
This reverts commit 3d81e11b49366b5636b8524ba0f8c7076e3fdf34.
As reported by Federico, some games require the 'sort by year' since
they truncate the extensions which do not fit the fixed size string
array.
Seemingly I did not consider that, as the documentation (both Mesa and
Nvidia) mentions about program crashes ... which are worked around by
setting the env. variable.
This commit reinstates the workaround and enhances the documentation.
Cc: Marek Olšák <maraeo at gmail.com>
Cc: Ian Romanick <idr at freedesktop.org>
Reported-by: Federico Dossena <info at fdossena.com>
Fixes: 3d81e11b493 ("mesa: remove unnecessary 'sort by year' for the GL
extensions")
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Tested-by: Federico Dossena <info at fdossena.com>
(cherry picked from commit fe8be81b4a525fec355e2f80c254711981ce0dbd)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=310655d8fad2db3153b3835956aa1a28e1b0aad8
Author: Emil Velikov <emil.velikov at collabora.com>
Date: Wed Aug 29 18:14:02 2018 +0100
vl/dri3: do full teardown on screen_destroy
Earlier commit added support for 'front_buffers', erroneously adding a
return in vl_dri3_screen_destroy. Effectively leaking a lot of state.
Fixes: 8d7ac0a4e4d ("vl/dri3: implement DRI3 BufferFromPixmap")
Cc: Leo Liu <leo.liu at amd.com>
Cc: Christian König <christian.koenig at amd.com>
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
Reviewed-by: Leo Liu <leo.liu at amd.com>
(cherry picked from commit d081ad2aa25c5673ec1927fca81e6ac65de4b1b1)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd95851fb7c20f521333d9371a8736f0aa9f4556
Author: Fritz Koenig <frkoenig at google.com>
Date: Mon Sep 17 13:51:35 2018 -0700
i965: Replace checks for rb->Name with FlipY (v2)
In the GL_MESA_framebuffer_flip_y implementation
_mesa_is_winsys_fbo checks were replaced with
FlipY checks. rb->Name is also used to determine
if a buffer is winsys.
v2: Fixes annotation [for emil]
Fixes: ab05dd183cc ("i965: implement GL_MESA_framebuffer_flip_y [v3]")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Chad Versace <chadversary at chromium.org>
(cherry picked from commit 08f97407fb14f53bf9f43dc4165a185418437a6b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e13f16a24a64bdb9b6aa871b61f053fa0271d4ae
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Sep 22 06:59:22 2018 -0500
nir/from_ssa: Don't rewrite derefs destinations to registers
We already call nir_rematerialize_derefs_in_use_blocks_impl prior to
calling nir_lower_ssa_defs_to_regs_block so the assertion that all deref
uses in the block should hold. This fixes the following CTS test when
SPIR-V optimization recipe 1:
dEQP-VK.glsl.struct.local.loop_nested_struct_array_vertex
Fixes: 606eb56ab9449b "intel/nir: Only lower load/store derefs"
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
(cherry picked from commit 00f385e6d457d9b57f683ea52157e1620b96fa8c)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4945b25d6fd81af943987de27628cf9772947868
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Oct 1 20:17:24 2018 -0500
intel/fs: Fix a typo in need_matching_subreg_offset
This fixes a bunch of Vulkan subgroup tests on little core platforms.
Fixes: 4150920b95 "intel/fs: Add a helper for emitting scan operations"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Tested-by: Mark Janes <mark.a.janes at intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
(cherry picked from commit 7e7959fcb76da59e1cec8b704069210a1092e1dd)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=285702582a4ae4b16dd9b3a7e1b78bfc0b934aa8
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Oct 7 17:45:07 2018 -0400
nvc0: fix blitting red to srgb8_alpha
For some reason the 2d engine can't handle this. Red formats get special
treatment there, so perhaps related.
Fixes dEQP-GLES3 tests of the form:
dEQP-GLES3.functional.fbo.blit.conversion.r{8,16f,32f}_to_srgb8_alpha8
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst at redhat.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 92f56fbd8969801fc88de606e1051dc397331e7d)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d591014dd71148087ad2e481407c50a2ac9ce0f3
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Oct 7 17:43:57 2018 -0400
nv50,nvc0: guard against zero-size blits
The current state tracker can generate these sometimes. Fixing this is
more involved, and due to some integer math we can generate
divisions-by-zero.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst at redhat.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 9bf0614116cdfdbfca9952c6547331731a462dcc)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f43af3390f9a91bcb25edecfa411bdef3cae59e
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sun Oct 7 14:57:17 2018 -0400
nv50,nvc0: mark RGBX_UINT formats as renderable
This helps st/mesa avoid some (apparently) buggy fallbacks. Specifically
the CopyTexSubImage fallback tries to read texture A as RGBA_FLOAT and
write back that data into the target format, which fails for integer
formats which have no appropriate logic to do the conversion.
Since integer formats don't blend, there's no harm in the fact that the
"A" component gets written anyways.
Fixes, among others:
https://www.khronos.org/registry/webgl/sdk/tests/conformance2/textures/canvas/tex-2d-rgb8ui-rgb_integer-unsigned_byte.html
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 78d3640e49918cbd7a9fd4d0220e47c81902f455)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a11b481c9837da9d499b1ae0e858a531abe18db9
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Oct 5 02:18:20 2018 -0400
glsl: fix array assignments of a swizzled vector
This happens in situations where we might do
vec.wzyx[i] = ...
The swizzle would get effectively ignored because of the interaction
between how ir_assignment->set_lhs works and overwriting the write_mask.
There are two cases, one where i is a constant, and another where i is
variable. We have to be extra-careful in both cases.
Fixes the following WebGL test:
https://www.khronos.org/registry/webgl/sdk/tests/conformance2/glsl3/vector-dynamic-indexing-swizzled-lvalue.html
And the new piglit tests:
swizzled-writemask-indexing-nonconst.shader_test
swizzled-writemask-indexing.shader_test
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 1bb1c03d618a9636563cf4dcf067876e50ba0d81)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=713e9911632d1d4402ac10942caf37c140bd2ab2
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Tue Sep 25 17:04:40 2018 +0300
glsl: do not attempt assignment if operand type not parsed correctly
v2: check types of both operands (Ian)
Cc: mesa-stable at lists.freedesktop.org
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108012
(cherry picked from commit d1fa69ed61d5aebeb69ce8a415c098035a953d48)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=857750d29624f7f8b7e0ba1f21996f0d9598bfce
Author: Marek Olšák <marek.olsak at amd.com>
Date: Thu Oct 4 00:55:52 2018 -0400
drirc: add a workaround for ARMA 3
Cc: 18.2 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 8e0b4cb8a1fcb1572be8eca16a806520aac08a61)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8927cf03bbb64d0be1fbb68f1a505b81d3e8ba26
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jul 9 14:21:33 2018 -0700
anv: Use separate MOCS settings for external BOs
On Broadwell and above, we have to use different MOCS settings to allow
the kernel to take over and disable caching when needed for external
buffers. On Broadwell, this is especially important because the kernel
can't disable eLLC so we have to do it in userspace. We very badly
don't want to do that on everything so we need separate MOCS for
external and internal BOs.
In order to do this, we add an anv-specific BO flag for "external" and
use that to distinguish between buffers which may be shared with other
processes and/or display and those which are entirely internal. That,
together with an anv_mocs_for_bo helper lets us choose the right MOCS
settings for each BO use.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99507
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
(cherry picked from commit 7a89a0d9edae638e68e4b4ee8e0cbb34baa9c080)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
Conflicts:
src/intel/vulkan/anv_image.c
src/intel/vulkan/genX_gpu_memcpy.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=164a28ada25897559f612ddcd6b5e1aac82ea7f4
Author: Emil Velikov <emil.velikov at collabora.com>
Date: Mon Sep 3 13:05:23 2018 +0100
egl: make eglSwapBuffers* a no-op for !window surfaces
Analogous to the previous commit - the spec says the function is a
no-op when a pbuffer or pixmap surface is used.
Cc: samiuddi <sami.uddin.mohammad at intel.com>
Cc: Erik Faye-Lund <kusmabite at gmail.com>
Cc: Tomasz Figa <tfiga at chromium.org>
Cc: <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
(cherry picked from commit 8f66743ca2cd781e912a3998196bf2ef1b9f8f4c)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d75a6028396d3f3461370166963cafb9503fe4cc
Author: Emil Velikov <emil.velikov at collabora.com>
Date: Mon Sep 3 13:05:22 2018 +0100
egl: make eglSwapInterval a no-op for !window surfaces
As the spec says, the function is a no-op when the surface is not a
window one.
That spec implies that EGL_TRUE should be returned in that case, yet
the ARM driver seems to return EGL_FALSE + EGL_BAD_SURFACE.
The Nvidia driver returns EGL_TRUE. We follow that behaviour until a
decision is made.
https://gitlab.khronos.org/egl/API/merge_requests/17
Cc: samiuddi <sami.uddin.mohammad at intel.com>
Cc: Erik Faye-Lund <kusmabite at gmail.com>
Cc: Tomasz Figa <tfiga at chromium.org>
Cc: <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
(cherry picked from commit 64b4ccde0cab4bbabba8abbf206ec5aa53399821)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=382099b7ade7de94874a4b0e3d50a3c0a36e03be
Author: Emil Velikov <emil.velikov at collabora.com>
Date: Wed Aug 29 18:13:13 2018 +0100
st/nine: do not double-close the fd on teardown
As the newly introduced comment says:
The pipe loader takes ownership of the fd
Thus, there's no need to close it again.
Cc: Patrick Rudolph <siro at das-labor.org>
Cc: Axel Davy <davyaxel0 at gmail.com>
Cc: mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
Reviewed-by: Axel Davy <davyaxel0 at gmail.com>
(cherry picked from commit 7b8d1b313cd01bb916898d8bb92a566534e37677)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=57aeec6f781ec4aab52a30194c20b6f79618b20f
Author: Józef Kucia <joseph.kucia at gmail.com>
Date: Mon Sep 24 00:44:00 2018 +0200
radeonsi: avoid sending GS_EMIT in shaders without outputs
Fixes GPU hangs.
Cc: 18.1 18.2 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107857
Signed-off-by: Józef Kucia <joseph.kucia at gmail.com>
Signed-off-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit e24a4e05c7a7b9f3a06fa55284d6258ceff44fdd)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ba6f668df3f412549a1540024379533a7e4e3af
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Sep 21 09:27:48 2018 -0500
nir/cf: Remove phi sources if needed in nir_handle_add_jump
If the block in which the jump is inserted is the predecessor of a phi
then we need to remove phi sources otherwise the phi may end up with
things improperly connected. This fixes the following CTS test when
dEQP is run with SPIR-V optimization recipe 1:
dEQP-VK.glsl.functions.control_flow.return_in_nested_loop_vertex
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
(cherry picked from commit bfc89c668e288747f51e447729914c91d27207e8)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb63a4e1144d9cd8feda3799c68a32a769417b5f
Author: Juan A. Suarez Romero <jasuarez at igalia.com>
Date: Fri Oct 5 12:45:35 2018 +0200
docs: add sha256 checksums for 18.2.2
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=abaeb79eb2c16d7abad06719f24d1e59ad775aa6
Author: Juan A. Suarez Romero <jasuarez at igalia.com>
Date: Fri Oct 5 12:13:33 2018 +0200
docs: add release notes for 18.2.2
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b24d4810d97f81dbc31feab4b7c6dd11a96a1a3
Author: Juan A. Suarez Romero <jasuarez at igalia.com>
Date: Fri Oct 5 10:08:20 2018 +0000
Update version to 18.2.2
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
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