Mesa (master): intel/vec4: Fix nir_op_b2[fi] with 64-bit result

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Module: Mesa
Branch: master
Commit: 0e0dc596a2c008c32def103e175fcd5b7116f38f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e0dc596a2c008c32def103e175fcd5b7116f38f

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Wed Oct 10 22:04:17 2018 -0500

intel/vec4: Fix nir_op_b2[fi] with 64-bit result

This is valid NIR but you can't actually hit this case today.  GLSL IR
doesn't have a bool to double opcode; it does f2d(b2f(x)).  In SPIR-V we
don't have any to/from bool conversion opcodes at all.  However, the
next commit will make us start generating it so we should be ready.

Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>

---

 src/intel/compiler/brw_vec4_nir.cpp | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index eaf1754b00..5ccfd1f894 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -1586,7 +1586,12 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
 
    case nir_op_b2i:
    case nir_op_b2f:
-      emit(MOV(dst, negate(op[0])));
+      if (nir_dest_bit_size(instr->dest.dest) > 32) {
+         assert(dst.type == BRW_REGISTER_TYPE_DF);
+         emit_conversion_to_double(dst, negate(op[0]), false);
+      } else {
+         emit(MOV(dst, negate(op[0])));
+      }
       break;
 
    case nir_op_f2b: