Mesa (master): i965/fs: Add 64-bit int immediate support to dump_instructions()

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Module: Mesa
Branch: master
Commit: 58a51d0a67a00711c63ab28fcec7e1bb775c2097
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=58a51d0a67a00711c63ab28fcec7e1bb775c2097

Author: Matt Turner <mattst88 at gmail.com>
Date:   Thu Sep  6 11:15:55 2018 -0700

i965/fs: Add 64-bit int immediate support to dump_instructions()

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>

---

 src/intel/compiler/brw_fs.cpp   | 6 ++++++
 src/intel/compiler/brw_shader.h | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 23a25fedca..69726ed70e 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -6023,6 +6023,12 @@ fs_visitor::dump_instruction(backend_instruction *be_inst, FILE *file)
          case BRW_REGISTER_TYPE_UD:
             fprintf(file, "%uu", inst->src[i].ud);
             break;
+         case BRW_REGISTER_TYPE_Q:
+            fprintf(file, "%" PRId64 "q", inst->src[i].d64);
+            break;
+         case BRW_REGISTER_TYPE_UQ:
+            fprintf(file, "%" PRIu64 "uq", inst->src[i].u64);
+            break;
          case BRW_REGISTER_TYPE_VF:
             fprintf(file, "[%-gF, %-gF, %-gF, %-gF]",
                     brw_vf_to_float((inst->src[i].ud >>  0) & 0xff),
diff --git a/src/intel/compiler/brw_shader.h b/src/intel/compiler/brw_shader.h
index 7d97ddbd86..e1d598b878 100644
--- a/src/intel/compiler/brw_shader.h
+++ b/src/intel/compiler/brw_shader.h
@@ -89,6 +89,8 @@ struct backend_reg : private brw_reg
    using brw_reg::f;
    using brw_reg::d;
    using brw_reg::ud;
+   using brw_reg::d64;
+   using brw_reg::u64;
 };
 #endif