Mesa (master): radeonsi: fix incorrect hw screen offset and guardband computation

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Module: Mesa
Branch: master
Commit: 6cc79e4411f750471bb35faf8578069a6a2f44d1
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6cc79e4411f750471bb35faf8578069a6a2f44d1

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Oct 18 14:42:42 2018 -0400

radeonsi: fix incorrect hw screen offset and guardband computation

It resulted in assertion failures or incorrect rendering.

Broken by: 9e182b8313c5ab952498a76495f57e8420f9e5ad

---

 src/gallium/drivers/radeonsi/si_state_viewport.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_viewport.c b/src/gallium/drivers/radeonsi/si_state_viewport.c
index 587422e50c..b7fcd5bdb8 100644
--- a/src/gallium/drivers/radeonsi/si_state_viewport.c
+++ b/src/gallium/drivers/radeonsi/si_state_viewport.c
@@ -176,8 +176,8 @@ static void si_emit_guardband(struct si_context *ctx)
 	/* Determine the optimal hardware screen offset to center the viewport
 	 * within the viewport range in order to maximize the guardband size.
 	 */
-	int hw_screen_offset_x = (vp_as_scissor.maxx - vp_as_scissor.minx) / 2;
-	int hw_screen_offset_y = (vp_as_scissor.maxy - vp_as_scissor.miny) / 2;
+	int hw_screen_offset_x = (vp_as_scissor.maxx + vp_as_scissor.minx) / 2;
+	int hw_screen_offset_y = (vp_as_scissor.maxy + vp_as_scissor.miny) / 2;
 
 	const unsigned hw_screen_offset_max = 8176;
 	/* SI-CI need to align the offset to an ubertile consisting of all SEs. */