Mesa (master): radv: move nir_lower_io_to_scalar_early() to radv_link_shaders()

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Module: Mesa
Branch: master
Commit: c769ed10decaf9b0f09c570c81b7360cf4e6f507
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c769ed10decaf9b0f09c570c81b7360cf4e6f507

Author: Timothy Arceri <tarceri at itsqueeze.com>
Date:   Tue Oct 23 21:56:30 2018 +1100

radv: move nir_lower_io_to_scalar_early() to radv_link_shaders()

nir_lower_io_to_scalar_early() is really part of the link time
optimisations. Moving it here allows the code to be simplified
and also keeps the code easy to follow in the next patch.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>

---

 src/amd/vulkan/radv_pipeline.c | 44 +++++++++++++++++-------------------------
 1 file changed, 18 insertions(+), 26 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 8d15a048bb..396b44d25a 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1788,6 +1788,24 @@ radv_link_shaders(struct radv_pipeline *pipeline, nir_shader **shaders)
 		ordered_shaders[shader_count++] = shaders[MESA_SHADER_VERTEX];
 	}
 
+	if (shader_count > 1) {
+		unsigned first = ordered_shaders[shader_count - 1]->info.stage;
+		unsigned last = ordered_shaders[0]->info.stage;
+
+		for (int i = 0; i < shader_count; ++i)  {
+			nir_variable_mode mask = 0;
+
+			if (ordered_shaders[i]->info.stage != first)
+				mask = mask | nir_var_shader_in;
+
+			if (ordered_shaders[i]->info.stage != last)
+				mask = mask | nir_var_shader_out;
+
+			nir_lower_io_to_scalar_early(ordered_shaders[i], mask);
+			radv_optimize_nir(ordered_shaders[i], false, false);
+		}
+	}
+
 	for (int i = 1; i < shader_count; ++i)  {
 		nir_lower_io_arrays_to_elements(ordered_shaders[i],
 						ordered_shaders[i - 1]);
@@ -2033,17 +2051,6 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
 		modules[MESA_SHADER_FRAGMENT] = &fs_m;
 	}
 
-	/* Determine first and last stage. */
-	unsigned first = MESA_SHADER_STAGES;
-	unsigned last = 0;
-	for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
-		if (!pStages[i])
-			continue;
-		if (first == MESA_SHADER_STAGES)
-			first = i;
-		last = i;
-	}
-
 	for (unsigned i = 0; i < MESA_SHADER_STAGES; ++i) {
 		const VkPipelineShaderStageCreateInfo *stage = pStages[i];
 
@@ -2061,21 +2068,6 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
 		if (nir[i]->info.name) {
 			nir[i] = nir_shader_clone(NULL, nir[i]);
 		}
-
-		if (first != last) {
-			nir_variable_mode mask = 0;
-
-			if (i != first)
-				mask = mask | nir_var_shader_in;
-
-			if (i != last)
-				mask = mask | nir_var_shader_out;
-
-			if (!(flags & VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT)) {
-				nir_lower_io_to_scalar_early(nir[i], mask);
-				radv_optimize_nir(nir[i], false, false);
-			}
-		}
 	}
 
 	if (nir[MESA_SHADER_TESS_CTRL]) {