Mesa (staging/18.2): blorp: Emit a dummy 3DSTATE_WM prior to 3DSTATE_WM_HZ_OP

[GitLab Mirror]

Module: Mesa
Branch: staging/18.2
Commit: 14d61206eb5fc3b73a9eec686dc8423fe266286a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=14d61206eb5fc3b73a9eec686dc8423fe266286a

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Tue Oct 16 14:58:18 2018 -0500

blorp: Emit a dummy 3DSTATE_WM prior to 3DSTATE_WM_HZ_OP

Cc: mesa-stable at lists.freedesktop.org
Suggested-by: Francisco Jerez <currojerez at riseup.net>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit b6b2b27809b9ce1cb8fdeb63fb4244c8a584434e)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>

Conflicts:
	src/intel/blorp/blorp_genX_exec.h

---

 src/intel/blorp/blorp_genX_exec.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 50341ab0ec..bd9a6ae755 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -1628,6 +1628,15 @@ blorp_emit_gen8_hiz_op(struct blorp_batch *batch,
     */
    blorp_emit_3dstate_multisample(batch, params);
 
+   /* According to the SKL PRM formula for WM_INT::ThreadDispatchEnable, the
+    * 3DSTATE_WM::ForceThreadDispatchEnable field can force WM thread dispatch
+    * even when WM_HZ_OP is active.  However, WM thread dispatch is normally
+    * disabled for HiZ ops and it appears that force-enabling it can lead to
+    * GPU hangs on at least Skylake.  Since we don't know the current state of
+    * the 3DSTATE_WM packet, just emit a dummy one prior to 3DSTATE_WM_HZ_OP.
+    */
+   blorp_emit(batch, GENX(3DSTATE_WM), wm);
+
    /* If we can't alter the depth stencil config and multiple layers are
     * involved, the HiZ op will fail. This is because the op requires that a
     * new config is emitted for each additional layer.