Mesa (18.2): 23 new commits
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Wed Oct 31 18:00:24 UTC 2018
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5ecce3c6ee324470140003bbdc5f69dac2654ad
Author: Alok Hota <alok.hota at intel.com>
Date: Wed Sep 19 12:42:57 2018 -0500
swr/rast: fix intrinsic/function for LLVM 7 compatibility
Converted from x86 VFMADDPS intrinsic to generic LLVM intrinsic, and
removed createInstructionSimplifierPass, which were both removed in LLVM
7.0.0
These changes combine patches we received from the community and our own
internal patches
Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>
Tested-by: Chuck Atkins <chuck.atkins at kitware.com>
(cherry picked from commit 8c872ac2e39affb2df3586a596e44a029535949d)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4bb9bc069831843159d77a3920f59718874cfc6
Author: Rob Clark <robdclark at gmail.com>
Date: Sun Oct 28 10:45:06 2018 -0400
freedreno: don't flush when new and old pfb is identical
In the 'inorder' case (ie. FD_MESA_DEBUG=inorder, or old kernel), if the
u_blitter clear path is used (a3xx, a4xx, and some fallback cases on
newer gens), util_blitter_restore_fb_state() will set_framebuffer_state()
to something that is identical to the current fb state, which triggers
an unnecessary flush, and then eventually an assert:
(gdb) bt
#0 0x0000007fbf24a078 in kill () from /lib64/libc.so.6
#1 0x0000007fbe061278 in _debug_assert_fail (expr=0x7fbe93a820 "!batch->flushed", file=0x7fbe93a628 "../src/gallium/drivers/freedreno/freedreno_batch.c", line=491, function=0x7fbe93a990 <__func__.17380> "fd_batch_check_size") at ../src/gallium/auxiliary/util/u_debug.c:322
#2 0x0000007fbe1ccb8c in fd_batch_check_size (batch=0x55556d5a70) at ../src/gallium/drivers/freedreno/freedreno_batch.c:491
#3 0x0000007fbe1d0e08 in fd_clear (pctx=0x55555c61e0, buffers=5, color=0x55556e388c, depth=1, stencil=0) at ../src/gallium/drivers/freedreno/freedreno_draw.c:463
#4 0x0000007fbe57afa4 in st_Clear (ctx=0x55556e17b0, mask=18) at ../src/mesa/state_tracker/st_cb_clear.c:452
The assert was introduced in 4b847b38ae3, so from a functionality
standpoint this patch fixes that commit. But it should also avoid an
unnecessary flush in the 'inorder' case, fixing a performance bug.
Fixes: 4b847b38ae3 freedreno: make fd_batch a one-shot thing
Signed-off-by: Rob Clark <robdclark at gmail.com>
(cherry picked from commit a61952e7374c3d30cf05765245bf6f5d5fcbe900)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8ddd70d04837ef24d5f0d3aff8a89f12d14f925
Author: Rob Clark <robdclark at gmail.com>
Date: Tue Sep 25 12:15:58 2018 -0400
freedreno: fix inorder rendering case
Signed-off-by: Rob Clark <robdclark at gmail.com>
(cherry picked from commit 12de415ad1abb67863f6efb7394552a12b9e3b4b)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
Conflicts:
src/gallium/drivers/freedreno/freedreno_state.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2edd62b4a25ddb1c0099bbdaf29109b1e20cd0bb
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Oct 26 13:36:01 2018 -0500
anv: Flag semaphore BOs as external
It probably doesn't actually break anything but it does cause some
assertions in debug builds.
Fixes: 7a89a0d9edae6 "anv: Use separate MOCS settings for external BOs"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
(cherry picked from commit cbd44686952b4275d654bcb3555111b412b8c8f4)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aaff8c7a0ed55d71e9dd0a6fef6905d6a2536c3f
Author: Nanley Chery <nanley.g.chery at intel.com>
Date: Thu Oct 25 14:08:52 2018 -0700
intel/blorp: Define the clear value bounds for HiZ clears
Follow the restriction of making sure the clear value is between the min
and max values defined in CC_VIEWPORT. Avoids a simulator warning for
some piglit tests, one of them being:
./bin/depthstencil-render-miplevels 146 d=z32f_s8
Jason found this to fix incorrect clearing on SKL.
Fixes: 09948151ab1d5184b4dd9052bb1f710fa1e00a7b
("intel/blorp: Add the BDW+ optimized HZ_OP sequence to BLORP")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Tested-by: Jason Ekstrand <jason at jlekstrand.net>
(cherry picked from commit 5bcf479524b96554cab7d2429dacf650b4054638)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
Conflicts:
src/intel/blorp/blorp_genX_exec.h
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8afef6d53a26772a4f76d594e187e4c740f743fc
Author: Alex Smith <asmith at feralinteractive.com>
Date: Thu Oct 25 10:50:52 2018 +0100
anv: Fix sanitization of stencil state when the depth test is disabled
When depth testing is disabled, we shouldn't pay attention to the
specified depthCompareOp, and just treat it as always passing. Before,
if the depth test is disabled, but depthCompareOp is VK_COMPARE_OP_NEVER
(e.g. from the app having zero-initialized the structure), then
sanitize_stencil_face() would have incorrectly changed passOp to
VK_STENCIL_OP_KEEP.
v2: Roll the depthTestEnable check into the ds_aspect check below since
they now both do the same thing.
Fixes: 028e1137e6 "anv/pipeline: Be smarter about depth/stencil state"
Signed-off-by: Alex Smith <asmith at feralinteractive.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
(cherry picked from commit 3bd239f71dc9365025c879c3a658493a6ca3504f)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=957c148aa94489e7f4315efafb5067a81b3675bc
Author: Juan A. Suarez Romero <jasuarez at igalia.com>
Date: Mon Oct 29 10:54:13 2018 +0100
cherry-ignore: Revert "anv/skylake: disable ForceThreadDispatchEnable"
pick: This commit reverts 0fa9e6d7b30 which did not land in branch.
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=14d61206eb5fc3b73a9eec686dc8423fe266286a
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Oct 16 14:58:18 2018 -0500
blorp: Emit a dummy 3DSTATE_WM prior to 3DSTATE_WM_HZ_OP
Cc: mesa-stable at lists.freedesktop.org
Suggested-by: Francisco Jerez <currojerez at riseup.net>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit b6b2b27809b9ce1cb8fdeb63fb4244c8a584434e)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
Conflicts:
src/intel/blorp/blorp_genX_exec.h
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e69b51d632e9e36c85e1799488d362fd276bd584
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Oct 19 19:08:58 2018 -0500
spirv: Use the right bit-size for spec constant ops
Previously, we would always pull the bit size from the destination which
is wrong for opcodes like nir_ilt where the sources are variable-sized
but the destination is a fixed size. We were getting lucky before
because nir_op_ilt returns a 32-bit value and basically everyone who
uses spec constants uses 32-bit ones.
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit 8fa70cfcfdda1094bc19e9707eb9333477a2d2bf)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=37ba112d0772cb21ccbf1dd9abcdd3eefe692db7
Author: David McFarland <corngood at gmail.com>
Date: Tue Oct 23 21:51:09 2018 -0300
util: Change remaining uint32 cache ids to sha1
After discussion with Timothy Arceri. disk_cache_get_function_identifier
was using only the first byte of the sha1 build-id. Replace
disk_cache_get_function_identifier with implementation from
radv_get_build_id. Instead of writing a uint32_t it now writes to a
mesa_sha1. All drivers using disk_cache_get_function_identifier are
updated accordingly.
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
Fixes: 83ea8dd99bb1 ("util: add disk_cache_get_function_identifier()")
[Juan A. Suarez: resolve trivial conflicts]
(cherry picked from commit 07a00a8729d709a4c43c828c64242c226607f09a)
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
Conflicts:
src/gallium/drivers/radeonsi/si_pipe.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0aa50c3f68d1ba3fd8f15acb59a8e2c73ba9a2b
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Tue Oct 23 10:54:24 2018 +0200
radv: Emit enqueued pipeline barriers on event write.
Since the CPU can read them we need to execute any GPU->CPU
flushes before the event is written.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108524
Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
(cherry picked from commit d41c3cc01314fd2586ad2392a05647197d04c28d)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=58df8607cd0b17dfbedac5a1ac4d97d21d54bda0
Author: Alok Hota <alok.hota at intel.com>
Date: Tue Oct 16 18:15:29 2018 -0500
swr/rast: ignore CreateElementUnorderedAtomicMemCpy
This function's API changed between LLVM 5 and 6. Compile errors occur
when building with LLVM 6+ if LLVM 5 was used for a dist tarball
CC: <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107865
Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
(cherry picked from commit edf38019a070b0d2ce66160fe9ff0a94ce137539)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=63f01f2ef748ab17c720e54da202c04a4a22ff51
Author: Elie Tournier <tournier.elie at gmail.com>
Date: Thu Sep 6 10:46:32 2018 +0100
gallium: Correctly handle no config context creation
This patch fixes the following Piglit test:
spec at egl_mesa_configless_context@basic
It also fixes few test in a virgl guest.
v2: Evaluate the value of no_config (Ilia)
Suggested-by: Emil Velikov <emil.velikov at collabora.com>
Signed-off-by: Elie Tournier <elie.tournier at collabora.com>
Signed-off-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit 9179c745f646a85274b7a295ee3577e48f8d0d3f)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c13a3d4de192279a520742c7a9425354657e35b9
Author: Liviu Prodea <liviuprodea at yahoo.com>
Date: Wed Oct 24 11:08:35 2018 +0100
scons: Put to rest zombie texture_float build option.
I found a remnant of texture_float build option that wasn't removed in
commit 66673bef941af344314fe9c91cad8cd330b245eb
This patch removes it.
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Jose Fonseca <jfonseca at vmware.com>
(cherry picked from commit d99fda17c8318af96158edc18f7532f049b4304e)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d39924f601c5198890925414987df025011b0ff4
Author: Eric Engestrom <eric.engestrom at intel.com>
Date: Thu Oct 18 15:51:47 2018 +0100
radv: s/abs/fabsf/ for floats
Fixes: a4c4efad89eceb26cf82 "radv: Rework guard band calculation"
Signed-off-by: Eric Engestrom <eric.engestrom at intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
(cherry picked from commit 17b03b532022d4042fb2170b38dc28f5ff22bb8a)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d63cd4ac2e4fd7075b15ebf81aacfdc05b9bf25
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Mon Oct 22 07:26:44 2018 -0700
meson: don't require libelf for r600 without LLVM
r600 doesn't have a hard requirement on LLVM, and therefore doesn't have
a hard requirement on libelf. Currently the logic doesn't allow that
however.
Distro-bug: https://bugs.gentoo.org/669058
Fixes: 5060c51b6f4dfb0d5358bde6523285163d3faaad
("meson: build r600 driver")
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit 4e785fb383eaa80e7def0d639eddefb781ec3f4f)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd914013c0fc67fcd6be508074a3e6a69d1bdd67
Author: Connor Abbott <cwabbott0 at gmail.com>
Date: Thu Oct 18 15:39:13 2018 +0200
ac: Fix loading a dvec3 from an SSBO
The comment was wrong, since the loop above casts to a type with the
correct bitsize already.
Fixes: 7e7ee82698247d8f93fe37775b99f4838b0247dd ("ac: add support for 16bit buffer loads")
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
(cherry picked from commit 27fe3f5b5a18c7ae404ac933dae6a9adcb2d5f7b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3777d9a839a18793d7e375e3c07633ff9257a56
Author: Connor Abbott <cwabbott0 at gmail.com>
Date: Thu Oct 18 15:30:11 2018 +0200
ac: Introduce ac_build_expand()
And implement ac_bulid_expand_to_vec4() on top of it.
Fixes: 7e7ee82698247d8f93fe37775b99f4838b0247dd ("ac: add support for 16bit buffer loads")
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
(cherry picked from commit 59535b05cf93f7be5487bd07fb74b0d9feed24de)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8d22f7b6ebf5037900d041ac519f65bbdb8522e
Author: Michel Dänzer <michel.daenzer at amd.com>
Date: Mon Oct 1 18:43:46 2018 +0200
loader/dri3: Also wait for front buffer fence if we triggered it
In that case, we have to wait for the fence to synchronize with the
corresponding drawing we triggered in the X server.
Fixes incorrect display with the i965 driver and some applications, e.g.
solvespace.
Bugzilla: https://bugs.freedesktop.org/108097
Fixes: aefac10fecc9 "loader/dri3: Only wait for back buffer fences in
dri3_get_buffer"
Tested-by: Sergii Romantsov <sergii.romantsov at globallogic.com>
(cherry picked from commit c20ba1be1843d035f36e9794bee7aea9abfc2f8b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4c1c0952416207b9d8cd6e411d42b2a9895988b
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue Oct 16 15:10:01 2018 -0400
radeonsi: fix a VGT hang with primitive restart on Polaris10 and later
Cc: 18.1 18.2 <mesa-stable at lists.freedesktop.org>
Tested-by: Jakob Bornecrantz <jakob at collabora.com>
(cherry picked from commit eae8f49fc65e6e625f5e05d38c3bf1b61b84bd3d)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6899350a190e65ff8809fbcc01be32624f7edcb1
Author: Jan Vesely <jan.vesely at rutgers.edu>
Date: Thu Oct 18 15:15:06 2018 -0400
radeonsi: Bump number of allowed global buffers to 32
Fixes assertion failure/crash when running luxmark/luxball on clover.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108272
CC: mesa-stable at lists.freedesktop.org
Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit 06bf56725db1827dfcb86b1d0bcd71d195fda1d2)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c4ff233b12cd8d3d97476b75123d2a097efb02f
Author: Andres Rodriguez <andresx7 at gmail.com>
Date: Thu Oct 18 15:32:31 2018 -0400
radv: fix check for perftest options size
It was using the debug options array size.
CC: mesa-stable at lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
(cherry picked from commit e71a87775e48f2e26864e6c2198c7625e27bbab1)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8da28e563b87a3ca5e342b33dd675a7410526b60
Author: Alex Smith <asmith at feralinteractive.com>
Date: Mon Oct 15 15:50:20 2018 +0100
ac/nir: Use context-specific LLVM types
LLVMInt*Type() return types from the global context and therefore are
not safe for use in other contexts. Use types from our own context
instead.
Fixes frequent crashes seen when doing multithreaded pipeline creation.
Fixes: 4d0b02bb5a "ac: add support for 16bit load_push_constant"
Fixes: 7e7ee82698 "ac: add support for 16bit buffer loads"
Cc: "18.2" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Alex Smith <asmith at feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
(cherry picked from commit ca83d51cfb154af12ee6e17a533df6cbbc890e22)
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