Mesa (staging/18.1): nvir: Always split 64-bit IMAD/IMUL operations

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Fri Sep 14 16:15:57 UTC 2018


Module: Mesa
Branch: staging/18.1
Commit: 649aff1a8788684c3160ab6001016054de251f39
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=649aff1a8788684c3160ab6001016054de251f39

Author: Pierre Moreau <pierre.morrow at free.fr>
Date:   Tue Dec  5 00:51:04 2017 +0100

nvir: Always split 64-bit IMAD/IMUL operations

Those operations do not map to actual hardware instructions, therefore
those should always be lowered to 32-bit instructions.

Fixes: 009c54aa7af "nv50/ir: Split 64-bit integer MAD/MUL operations"

Signed-off-by: Pierre Moreau <pierre.morrow at free.fr>
Reviewed-by: Karol Herbst <kherbst at redhat.com>
Signed-off-by: Karol Herbst <kherbst at redhat.com>
(cherry picked from commit 21b92b3464193a203e069f50c21ebec146ae0215)
Conflicts resolved by Dylan

Conflicts:
	src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp

---

 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 39177bd044..6a77f8a291 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -3797,7 +3797,7 @@ Program::optimizeSSA(int level)
    RUN_PASS(2, AlgebraicOpt, run);
    RUN_PASS(2, ModifierFolding, run); // before load propagation -> less checks
    RUN_PASS(1, ConstantFolding, foldAll);
-   RUN_PASS(1, Split64BitOpPreRA, run);
+   RUN_PASS(0, Split64BitOpPreRA, run);
    RUN_PASS(1, LoadPropagation, run);
    RUN_PASS(1, IndirectPropagation, run);
    RUN_PASS(2, MemoryOpt, run);




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