Mesa (staging/18.2): nvir: Always split 64-bit IMAD/IMUL operations

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Module: Mesa
Branch: staging/18.2
Commit: 5b58be3590daa62aa814c31d6fd3a79903098c1d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5b58be3590daa62aa814c31d6fd3a79903098c1d

Author: Pierre Moreau <pierre.morrow at free.fr>
Date:   Tue Dec  5 00:51:04 2017 +0100

nvir: Always split 64-bit IMAD/IMUL operations

Those operations do not map to actual hardware instructions, therefore
those should always be lowered to 32-bit instructions.

Fixes: 009c54aa7af "nv50/ir: Split 64-bit integer MAD/MUL operations"

Signed-off-by: Pierre Moreau <pierre.morrow at free.fr>
Reviewed-by: Karol Herbst <kherbst at redhat.com>
Signed-off-by: Karol Herbst <kherbst at redhat.com>
(cherry picked from commit 21b92b3464193a203e069f50c21ebec146ae0215)

---

 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 16022e6f23..7bb12cdf4c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -3855,7 +3855,7 @@ Program::optimizeSSA(int level)
    RUN_PASS(2, AlgebraicOpt, run);
    RUN_PASS(2, ModifierFolding, run); // before load propagation -> less checks
    RUN_PASS(1, ConstantFolding, foldAll);
-   RUN_PASS(1, Split64BitOpPreRA, run);
+   RUN_PASS(0, Split64BitOpPreRA, run);
    RUN_PASS(2, LateAlgebraicOpt, run);
    RUN_PASS(1, LoadPropagation, run);
    RUN_PASS(1, IndirectPropagation, run);