Mesa (master): pan/midgard: Improve disassembler robustness

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Module: Mesa
Branch: master
Commit: 1ab629074622966c646a3f409859ef30a813dfe6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ab629074622966c646a3f409859ef30a813dfe6

Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Aug 14 14:11:54 2019 -0700

pan/midgard: Improve disassembler robustness

Some memory corruption / etc issues let to an accidental "fuzzing" of
the disassembler ;) This uncovered some issues leading to a disassembler
hang, so let's fix that.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>

---

 src/panfrost/midgard/disassemble.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/panfrost/midgard/disassemble.c b/src/panfrost/midgard/disassemble.c
index 1092fcf7374..3e18c19593b 100644
--- a/src/panfrost/midgard/disassemble.c
+++ b/src/panfrost/midgard/disassemble.c
@@ -283,6 +283,7 @@ bits_for_mode(midgard_reg_mode mode)
         case midgard_reg_mode_64:
                 return 64;
         default:
+                unreachable("Invalid reg mode");
                 return 0;
         }
 }
@@ -410,6 +411,14 @@ print_mask_vec16(uint8_t mask, midgard_dest_override override)
 static void
 print_mask(uint8_t mask, unsigned bits, midgard_dest_override override)
 {
+        if (bits < 16) {
+                /* Shouldn't happen but with junk / out-of-spec shaders it
+                 * would cause an infinite loop */
+
+                printf("/* XXX: bits = %d */", bits);
+                return;
+        }
+
         if (bits == 8) {
                 print_mask_vec16(mask, override);
                 return;